FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/net/imx-dwmac.txt

     IMX8 glue layer controller, NXP imx8 families support Synopsys MAC 5.10a IP.
     
     This file documents platform glue layer for IMX.
     Please see stmmac.txt for the other unchanged properties.
     
     The device node has following properties.
     
     Required properties:
     - compatible:  Should be "nxp,imx8mp-dwmac-eqos" to select glue layer
                   and "snps,dwmac-5.10a" to select IP version.
    - clocks: Must contain a phandle for each entry in clock-names.
    - clock-names: Should be "stmmaceth" for the host clock.
                   Should be "pclk" for the MAC apb clock.
                   Should be "ptp_ref" for the MAC timer clock.
                   Should be "tx" for the MAC RGMII TX clock:
                   Should be "mem" for EQOS MEM clock.
                    - "mem" clock is required for imx8dxl platform.
                    - "mem" clock is not required for imx8mp platform.
    - interrupt-names: Should contain a list of interrupt names corresponding to
                       the interrupts in the interrupts property, if available.
                       Should be "macirq" for the main MAC IRQ
                       Should be "eth_wake_irq" for the IT which wake up system
    - intf_mode: Should be phandle/offset pair. The phandle to the syscon node which
                 encompases the GPR register, and the offset of the GPR register.
                    - required for imx8mp platform.
                    - is optional for imx8dxl platform.
    
    Optional properties:
    - intf_mode: is optional for imx8dxl platform.
    - snps,rmii_refclk_ext: to select RMII reference clock from external.
    
    Example:
            eqos: ethernet@30bf0000 {
                    compatible = "nxp,imx8mp-dwmac-eqos", "snps,dwmac-5.10a";
                    reg = <0x30bf0000 0x10000>;
                    interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
                                 <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
                    interrupt-names = "eth_wake_irq", "macirq";
                    clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
                             <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
                             <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
                             <&clk IMX8MP_CLK_ENET_QOS>;
                    clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
                    assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
                                      <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
                                      <&clk IMX8MP_CLK_ENET_QOS>;
                    assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
                                             <&clk IMX8MP_SYS_PLL2_100M>,
                                             <&clk IMX8MP_SYS_PLL2_125M>;
                    assigned-clock-rates = <0>, <100000000>, <125000000>;
                    nvmem-cells = <&eth_mac0>;
                    nvmem-cell-names = "mac-address";
                    nvmem_macaddr_swap;
                    intf_mode = <&gpr 0x4>;
                    status = "disabled";
            };

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