The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/net/marvell-orion-mdio.txt

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    1 * Marvell MDIO Ethernet Controller interface
    2 
    3 The Ethernet controllers of the Marvel Kirkwood, Dove, Orion5x,
    4 MV78xx0, Armada 370, Armada XP, Armada 7k and Armada 8k have an
    5 identical unit that provides an interface with the MDIO bus.
    6 Additionally, Armada 7k and Armada 8k has a second unit which
    7 provides an interface with the xMDIO bus. This driver handles
    8 these interfaces.
    9 
   10 Required properties:
   11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
   12 - reg: address and length of the MDIO registers.  When an interrupt is
   13   not present, the length is the size of the SMI register (4 bytes)
   14   otherwise it must be 0x84 bytes to cover the interrupt control
   15   registers.
   16 
   17 Optional properties:
   18 - interrupts: interrupt line number for the SMI error/done interrupt
   19 - clocks: phandle for up to four required clocks for the MDIO instance
   20 
   21 The child nodes of the MDIO driver are the individual PHY devices
   22 connected to this MDIO bus. They must have a "reg" property given the
   23 PHY address on the MDIO bus.
   24 
   25 Example at the SoC level without an interrupt property:
   26 
   27 mdio {
   28         #address-cells = <1>;
   29         #size-cells = <0>;
   30         compatible = "marvell,orion-mdio";
   31         reg = <0xd0072004 0x4>;
   32 };
   33 
   34 Example with an interrupt property:
   35 
   36 mdio {
   37         #address-cells = <1>;
   38         #size-cells = <0>;
   39         compatible = "marvell,orion-mdio";
   40         reg = <0xd0072004 0x84>;
   41         interrupts = <30>;
   42 };
   43 
   44 And at the board level:
   45 
   46 mdio {
   47         phy0: ethernet-phy@0 {
   48                 reg = <0>;
   49         };
   50 
   51         phy1: ethernet-phy@1 {
   52                 reg = <1>;
   53         };
   54 }

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