The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/net/nfc/nfcmrvl.txt

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    1 * Marvell International Ltd. NCI NFC Controller
    2 
    3 Required properties:
    4 - compatible: Should be:
    5   - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices
    6   - "marvell,nfc-i2c" for I2C devices
    7   - "marvell,nfc-spi" for SPI devices
    8 
    9 Optional SoC specific properties:
   10 - pinctrl-names: Contains only one value - "default".
   11 - pintctrl-0: Specifies the pin control groups used for this controller.
   12 - reset-n-io: Output GPIO pin used to reset the chip (active low).
   13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames.
   14 
   15 Optional UART-based chip specific properties:
   16 - flow-control: Specifies that the chip is using RTS/CTS.
   17 - break-control: Specifies that the chip needs specific break management.
   18 
   19 Optional I2C-based chip specific properties:
   20 - i2c-int-falling: Specifies that the chip read event shall be trigged on
   21                    falling edge.
   22 - i2c-int-rising: Specifies that the chip read event shall be trigged on
   23                   rising edge.
   24 
   25 Example (for ARM-based BeagleBoard Black with 88W8887 on UART5):
   26 
   27 &uart5 {
   28 
   29         nfcmrvluart: nfcmrvluart@5 {
   30                 compatible = "marvell,nfc-uart";
   31 
   32                 reset-n-io = <&gpio3 16 0>;
   33 
   34                 hci-muxed;
   35                 flow-control;
   36         }
   37 };
   38 
   39 
   40 Example (for ARM-based BeagleBoard Black with 88W8887 on I2C1):
   41 
   42 &i2c1 {
   43         clock-frequency = <400000>;
   44 
   45         nfcmrvli2c0: i2c@1 {
   46                 compatible = "marvell,nfc-i2c";
   47 
   48                 reg = <0x8>;
   49 
   50                 /* I2C INT configuration */
   51                 interrupt-parent = <&gpio3>;
   52                 interrupts = <21 0>;
   53 
   54                 /* I2C INT trigger configuration */
   55                 i2c-int-rising;
   56 
   57                 /* Reset IO */
   58                 reset-n-io = <&gpio3 19 0>;
   59         };
   60 };
   61 
   62 
   63 Example (for ARM-based BeagleBoard Black on SPI0):
   64 
   65 &spi0 {
   66 
   67         mrvlnfcspi0: spi@0 {
   68                 compatible = "marvell,nfc-spi";
   69 
   70                 reg = <0>;
   71 
   72                 /* SPI Bus configuration */
   73                 spi-max-frequency = <3000000>;
   74                 spi-cpha;
   75                 spi-cpol;
   76 
   77                 /* SPI INT configuration */
   78                 interrupt-parent = <&gpio1>;
   79                 interrupts = <17 0>;
   80 
   81                 /* Reset IO */
   82                 reset-n-io = <&gpio3 19 0>;
   83         };
   84 };

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