The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/net/renesas,etheravb.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/net/renesas,etheravb.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Renesas Ethernet AVB
    8 
    9 maintainers:
   10   - Sergei Shtylyov <sergei.shtylyov@gmail.com>
   11 
   12 properties:
   13   compatible:
   14     oneOf:
   15       - items:
   16           - enum:
   17               - renesas,etheravb-r8a7742      # RZ/G1H
   18               - renesas,etheravb-r8a7743      # RZ/G1M
   19               - renesas,etheravb-r8a7744      # RZ/G1N
   20               - renesas,etheravb-r8a7745      # RZ/G1E
   21               - renesas,etheravb-r8a77470     # RZ/G1C
   22               - renesas,etheravb-r8a7790      # R-Car H2
   23               - renesas,etheravb-r8a7791      # R-Car M2-W
   24               - renesas,etheravb-r8a7792      # R-Car V2H
   25               - renesas,etheravb-r8a7793      # R-Car M2-N
   26               - renesas,etheravb-r8a7794      # R-Car E2
   27           - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1
   28 
   29       - items:
   30           - enum:
   31               - renesas,etheravb-r8a774a1     # RZ/G2M
   32               - renesas,etheravb-r8a774b1     # RZ/G2N
   33               - renesas,etheravb-r8a774c0     # RZ/G2E
   34               - renesas,etheravb-r8a774e1     # RZ/G2H
   35               - renesas,etheravb-r8a7795      # R-Car H3
   36               - renesas,etheravb-r8a7796      # R-Car M3-W
   37               - renesas,etheravb-r8a77961     # R-Car M3-W+
   38               - renesas,etheravb-r8a77965     # R-Car M3-N
   39               - renesas,etheravb-r8a77970     # R-Car V3M
   40               - renesas,etheravb-r8a77980     # R-Car V3H
   41               - renesas,etheravb-r8a77990     # R-Car E3
   42               - renesas,etheravb-r8a77995     # R-Car D3
   43               - renesas,etheravb-r8a779a0     # R-Car V3U
   44           - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2
   45 
   46       - items:
   47           - enum:
   48               - renesas,etheravb-r9a09g011 # RZ/V2M
   49           - const: renesas,etheravb-rzv2m  # RZ/V2M compatible
   50 
   51       - items:
   52           - enum:
   53               - renesas,r9a07g043-gbeth # RZ/G2UL
   54               - renesas,r9a07g044-gbeth # RZ/G2{L,LC}
   55               - renesas,r9a07g054-gbeth # RZ/V2L
   56           - const: renesas,rzg2l-gbeth  # RZ/{G2L,G2UL,V2L} family
   57 
   58   reg: true
   59 
   60   interrupts: true
   61 
   62   interrupt-names: true
   63 
   64   clocks: true
   65 
   66   clock-names: true
   67 
   68   iommus:
   69     maxItems: 1
   70 
   71   power-domains:
   72     maxItems: 1
   73 
   74   resets:
   75     maxItems: 1
   76 
   77   phy-mode: true
   78 
   79   phy-handle: true
   80 
   81   '#address-cells':
   82     description: Number of address cells for the MDIO bus.
   83     const: 1
   84 
   85   '#size-cells':
   86     description: Number of size cells on the MDIO bus.
   87     const: 0
   88 
   89   renesas,no-ether-link:
   90     type: boolean
   91     description:
   92       Specify when a board does not provide a proper AVB_LINK signal.
   93 
   94   renesas,ether-link-active-low:
   95     type: boolean
   96     description:
   97       Specify when the AVB_LINK signal is active-low instead of normal
   98       active-high.
   99 
  100   rx-internal-delay-ps:
  101     enum: [0, 1800]
  102 
  103   tx-internal-delay-ps:
  104     enum: [0, 2000]
  105 
  106 patternProperties:
  107   "^ethernet-phy@[0-9a-f]$":
  108     type: object
  109     $ref: ethernet-phy.yaml#
  110 
  111 required:
  112   - compatible
  113   - reg
  114   - interrupts
  115   - clocks
  116   - power-domains
  117   - resets
  118   - phy-mode
  119   - phy-handle
  120   - '#address-cells'
  121   - '#size-cells'
  122 
  123 allOf:
  124   - $ref: ethernet-controller.yaml#
  125 
  126   - if:
  127       properties:
  128         compatible:
  129           contains:
  130             enum:
  131               - renesas,etheravb-rcar-gen2
  132               - renesas,etheravb-r8a7795
  133               - renesas,etheravb-r8a7796
  134               - renesas,etheravb-r8a77961
  135               - renesas,etheravb-r8a77965
  136     then:
  137       properties:
  138         reg:
  139           items:
  140             - description: MAC register block
  141             - description: Stream buffer
  142     else:
  143       properties:
  144         reg:
  145           items:
  146             - description: MAC register block
  147 
  148   - if:
  149       properties:
  150         compatible:
  151           contains:
  152             enum:
  153               - renesas,etheravb-rcar-gen2
  154               - renesas,rzg2l-gbeth
  155     then:
  156       properties:
  157         interrupts:
  158           minItems: 1
  159           maxItems: 3
  160         interrupt-names:
  161           minItems: 1
  162           items:
  163             - const: mux
  164             - const: fil
  165             - const: arp_ns
  166         rx-internal-delay-ps: false
  167     else:
  168       if:
  169         properties:
  170           compatible:
  171             contains:
  172               const: renesas,etheravb-rzv2m
  173       then:
  174         properties:
  175           interrupts:
  176             minItems: 29
  177             maxItems: 29
  178           interrupt-names:
  179             items:
  180               pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$'
  181           rx-internal-delay-ps: false
  182         required:
  183           - interrupt-names
  184       else:
  185         properties:
  186           interrupts:
  187             minItems: 25
  188             maxItems: 25
  189           interrupt-names:
  190             items:
  191               pattern: '^ch[0-9]+$'
  192         required:
  193           - interrupt-names
  194           - rx-internal-delay-ps
  195 
  196   - if:
  197       properties:
  198         compatible:
  199           contains:
  200             enum:
  201               - renesas,etheravb-r8a774a1
  202               - renesas,etheravb-r8a774b1
  203               - renesas,etheravb-r8a774e1
  204               - renesas,etheravb-r8a7795
  205               - renesas,etheravb-r8a7796
  206               - renesas,etheravb-r8a77961
  207               - renesas,etheravb-r8a77965
  208               - renesas,etheravb-r8a77970
  209               - renesas,etheravb-r8a77980
  210               - renesas,etheravb-r8a779a0
  211     then:
  212       required:
  213         - tx-internal-delay-ps
  214     else:
  215       properties:
  216         tx-internal-delay-ps: false
  217 
  218   - if:
  219       properties:
  220         compatible:
  221           contains:
  222             const: renesas,etheravb-r8a77995
  223     then:
  224       properties:
  225         rx-internal-delay-ps:
  226           const: 1800
  227 
  228   - if:
  229       properties:
  230         compatible:
  231           contains:
  232             const: renesas,etheravb-r8a77980
  233     then:
  234       properties:
  235         tx-internal-delay-ps:
  236           const: 2000
  237 
  238   - if:
  239       properties:
  240         compatible:
  241           contains:
  242             const: renesas,rzg2l-gbeth
  243     then:
  244       properties:
  245         clocks:
  246           items:
  247             - description: Main clock
  248             - description: Register access clock
  249             - description: Reference clock for RGMII
  250         clock-names:
  251           items:
  252             - const: axi
  253             - const: chi
  254             - const: refclk
  255     else:
  256       if:
  257         properties:
  258           compatible:
  259             contains:
  260               const: renesas,etheravb-rzv2m
  261       then:
  262         properties:
  263           clocks:
  264             items:
  265               - description: Main clock
  266               - description: Coherent Hub Interface clock
  267               - description: gPTP reference clock
  268           clock-names:
  269             items:
  270               - const: axi
  271               - const: chi
  272               - const: gptp
  273       else:
  274         properties:
  275           clocks:
  276             minItems: 1
  277             items:
  278               - description: AVB functional clock
  279               - description: Optional TXC reference clock
  280           clock-names:
  281             minItems: 1
  282             items:
  283               - const: fck
  284               - const: refclk
  285 
  286 additionalProperties: false
  287 
  288 examples:
  289   - |
  290     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  291     #include <dt-bindings/interrupt-controller/arm-gic.h>
  292     #include <dt-bindings/power/r8a7795-sysc.h>
  293     #include <dt-bindings/gpio/gpio.h>
  294     aliases {
  295             ethernet0 = &avb;
  296     };
  297 
  298     avb: ethernet@e6800000 {
  299             compatible = "renesas,etheravb-r8a7795",
  300                          "renesas,etheravb-rcar-gen3";
  301             reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>;
  302             interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
  303                          <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
  304                          <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
  305                          <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
  306                          <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
  307                          <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
  308                          <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
  309                          <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
  310                          <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
  311                          <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
  312                          <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
  313                          <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
  314                          <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
  315                          <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
  316                          <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
  317                          <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
  318                          <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
  319                          <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
  320                          <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
  321                          <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
  322                          <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
  323                          <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
  324                          <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
  325                          <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
  326                          <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
  327             interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6",
  328                               "ch7", "ch8", "ch9", "ch10", "ch11", "ch12",
  329                               "ch13", "ch14", "ch15", "ch16", "ch17", "ch18",
  330                               "ch19", "ch20", "ch21", "ch22", "ch23", "ch24";
  331             clocks = <&cpg CPG_MOD 812>;
  332             clock-names = "fck";
  333             iommus = <&ipmmu_ds0 16>;
  334             power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
  335             resets = <&cpg 812>;
  336             phy-mode = "rgmii";
  337             phy-handle = <&phy0>;
  338             rx-internal-delay-ps = <0>;
  339             tx-internal-delay-ps = <2000>;
  340             #address-cells = <1>;
  341             #size-cells = <0>;
  342 
  343             phy0: ethernet-phy@0 {
  344                     compatible = "ethernet-phy-id0022.1622",
  345                                  "ethernet-phy-ieee802.3-c22";
  346                     rxc-skew-ps = <1500>;
  347                     reg = <0>;
  348                     interrupt-parent = <&gpio2>;
  349                     interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  350                     reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
  351             };
  352     };

Cache object: 52bc23fade632fffefb8d11e889ea050


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