1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7 title: Rockchip 10/100/1000 Ethernet driver(GMAC)
8
9 maintainers:
10 - David Wu <david.wu@rock-chips.com>
11
12 # We need a select here so we don't match all nodes with 'snps,dwmac'
13 select:
14 properties:
15 compatible:
16 contains:
17 enum:
18 - rockchip,px30-gmac
19 - rockchip,rk3128-gmac
20 - rockchip,rk3228-gmac
21 - rockchip,rk3288-gmac
22 - rockchip,rk3308-gmac
23 - rockchip,rk3328-gmac
24 - rockchip,rk3366-gmac
25 - rockchip,rk3368-gmac
26 - rockchip,rk3399-gmac
27 - rockchip,rk3568-gmac
28 - rockchip,rv1108-gmac
29 required:
30 - compatible
31
32 allOf:
33 - $ref: "snps,dwmac.yaml#"
34
35 properties:
36 compatible:
37 oneOf:
38 - items:
39 - enum:
40 - rockchip,px30-gmac
41 - rockchip,rk3128-gmac
42 - rockchip,rk3228-gmac
43 - rockchip,rk3288-gmac
44 - rockchip,rk3308-gmac
45 - rockchip,rk3328-gmac
46 - rockchip,rk3366-gmac
47 - rockchip,rk3368-gmac
48 - rockchip,rk3399-gmac
49 - rockchip,rv1108-gmac
50 - items:
51 - enum:
52 - rockchip,rk3568-gmac
53 - const: snps,dwmac-4.20a
54
55 clocks:
56 minItems: 5
57 maxItems: 8
58
59 clock-names:
60 contains:
61 enum:
62 - stmmaceth
63 - mac_clk_tx
64 - mac_clk_rx
65 - aclk_mac
66 - pclk_mac
67 - clk_mac_ref
68 - clk_mac_refout
69 - clk_mac_speed
70
71 clock_in_out:
72 description:
73 For RGMII, it must be "input", means main clock(125MHz)
74 is not sourced from SoC's PLL, but input from PHY.
75 For RMII, "input" means PHY provides the reference clock(50MHz),
76 "output" means GMAC provides the reference clock.
77 $ref: /schemas/types.yaml#/definitions/string
78 enum: [input, output]
79
80 rockchip,grf:
81 description: The phandle of the syscon node for the general register file.
82 $ref: /schemas/types.yaml#/definitions/phandle
83
84 tx_delay:
85 description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
86 $ref: /schemas/types.yaml#/definitions/uint32
87
88 rx_delay:
89 description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
90 $ref: /schemas/types.yaml#/definitions/uint32
91
92 phy-supply:
93 description: PHY regulator
94
95 required:
96 - compatible
97 - clocks
98 - clock-names
99
100 unevaluatedProperties: false
101
102 examples:
103 - |
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 #include <dt-bindings/clock/rk3288-cru.h>
106
107 gmac: ethernet@ff290000 {
108 compatible = "rockchip,rk3288-gmac";
109 reg = <0xff290000 0x10000>;
110 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
111 interrupt-names = "macirq";
112 clocks = <&cru SCLK_MAC>,
113 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
114 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
115 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
116 clock-names = "stmmaceth",
117 "mac_clk_rx", "mac_clk_tx",
118 "clk_mac_ref", "clk_mac_refout",
119 "aclk_mac", "pclk_mac";
120 assigned-clocks = <&cru SCLK_MAC>;
121 assigned-clock-parents = <&ext_gmac>;
122
123 rockchip,grf = <&grf>;
124 phy-mode = "rgmii";
125 clock_in_out = "input";
126 tx_delay = <0x30>;
127 rx_delay = <0x10>;
128 };
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