1 * Qualcomm Atheros ath10k wireless devices
2
3 Required properties:
4 - compatible: Should be one of the following:
5 * "qcom,ath10k"
6 * "qcom,ipq4019-wifi"
7 * "qcom,wcn3990-wifi"
8
9 PCI based devices uses compatible string "qcom,ath10k" and takes calibration
10 data along with board specific data via "qcom,ath10k-calibration-data".
11 Rest of the properties are not applicable for PCI based devices.
12
13 AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
14 and also uses most of the properties defined in this doc (except
15 "qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
16 to carry pre calibration data.
17
18 In general, entry "qcom,ath10k-pre-calibration-data" and
19 "qcom,ath10k-calibration-data" conflict with each other and only one
20 can be provided per device.
21
22 SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".
23
24 - reg: Address and length of the register set for the device.
25 - reg-names: Must include the list of following reg names,
26 "membase"
27 - interrupts: reference to the list of 17 interrupt numbers for "qcom,ipq4019-wifi"
28 compatible target.
29 reference to the list of 12 interrupt numbers for "qcom,wcn3990-wifi"
30 compatible target.
31 Must contain interrupt-names property per entry for
32 "qcom,ath10k", "qcom,ipq4019-wifi" compatible targets.
33
34 - interrupt-names: Must include the entries for MSI interrupt
35 names ("msi0" to "msi15") and legacy interrupt
36 name ("legacy") for "qcom,ath10k", "qcom,ipq4019-wifi"
37 compatible targets.
38
39 Optional properties:
40 - resets: Must contain an entry for each entry in reset-names.
41 See ../reset/reseti.txt for details.
42 - reset-names: Must include the list of following reset names,
43 "wifi_cpu_init"
44 "wifi_radio_srif"
45 "wifi_radio_warm"
46 "wifi_radio_cold"
47 "wifi_core_warm"
48 "wifi_core_cold"
49 - clocks: List of clock specifiers, must contain an entry for each required
50 entry in clock-names.
51 - clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",
52 "wifi_wcss_rtc" for "qcom,ipq4019-wifi" compatible target and
53 "cxo_ref_clk_pin" and optionally "qdss" for "qcom,wcn3990-wifi"
54 compatible target.
55 - qcom,msi_addr: MSI interrupt address.
56 - qcom,msi_base: Base value to add before writing MSI data into
57 MSI address register.
58 - qcom,ath10k-calibration-variant: string to search for in the board-2.bin
59 variant list with the same bus and device
60 specific ids
61 - qcom,ath10k-calibration-data : calibration data + board specific data
62 as an array, the length can vary between
63 hw versions.
64 - qcom,ath10k-pre-calibration-data : pre calibration data as an array,
65 the length can vary between hw versions.
66 - <supply-name>-supply: handle to the regulator device tree node
67 optional "supply-name" are "vdd-0.8-cx-mx",
68 "vdd-1.8-xo", "vdd-1.3-rfa", "vdd-3.3-ch0",
69 and "vdd-3.3-ch1".
70 - memory-region:
71 Usage: optional
72 Value type: <phandle>
73 Definition: reference to the reserved-memory for the msa region
74 used by the wifi firmware running in Q6.
75 - iommus:
76 Usage: optional
77 Value type: <prop-encoded-array>
78 Definition: A list of phandle and IOMMU specifier pairs.
79 - ext-fem-name:
80 Usage: Optional
81 Value type: string
82 Definition: Name of external front end module used. Some valid FEM names
83 for example: "microsemi-lx5586", "sky85703-11"
84 and "sky85803" etc.
85 - qcom,snoc-host-cap-8bit-quirk:
86 Usage: Optional
87 Value type: <empty>
88 Definition: Quirk specifying that the firmware expects the 8bit version
89 of the host capability QMI request
90 - qcom,xo-cal-data: xo cal offset to be configured in xo trim register.
91
92 - qcom,msa-fixed-perm: Boolean context flag to disable SCM call for statically
93 mapped msa region.
94
95 - qcom,coexist-support : should contain eithr "0" or "1" to indicate coex
96 support by the hardware.
97 - qcom,coexist-gpio-pin : gpio pin number information to support coex
98 which will be used by wifi firmware.
99
100 * Subnodes
101 The ath10k wifi node can contain one optional firmware subnode.
102 Firmware subnode is needed when the platform does not have TustZone.
103 The firmware subnode must have:
104
105 - iommus:
106 Usage: required
107 Value type: <prop-encoded-array>
108 Definition: A list of phandle and IOMMU specifier pairs.
109
110
111 Example (to supply PCI based wifi block details):
112
113 In this example, the node is defined as child node of the PCI controller.
114
115 pci {
116 pcie@0 {
117 reg = <0 0 0 0 0>;
118 #interrupt-cells = <1>;
119 #size-cells = <2>;
120 #address-cells = <3>;
121 device_type = "pci";
122
123 wifi@0,0 {
124 reg = <0 0 0 0 0>;
125 qcom,ath10k-calibration-data = [ 01 02 03 ... ];
126 ext-fem-name = "microsemi-lx5586";
127 };
128 };
129 };
130
131 Example (to supply ipq4019 SoC wifi block details):
132
133 wifi0: wifi@a000000 {
134 compatible = "qcom,ipq4019-wifi";
135 reg = <0xa000000 0x200000>;
136 resets = <&gcc WIFI0_CPU_INIT_RESET>,
137 <&gcc WIFI0_RADIO_SRIF_RESET>,
138 <&gcc WIFI0_RADIO_WARM_RESET>,
139 <&gcc WIFI0_RADIO_COLD_RESET>,
140 <&gcc WIFI0_CORE_WARM_RESET>,
141 <&gcc WIFI0_CORE_COLD_RESET>;
142 reset-names = "wifi_cpu_init",
143 "wifi_radio_srif",
144 "wifi_radio_warm",
145 "wifi_radio_cold",
146 "wifi_core_warm",
147 "wifi_core_cold";
148 clocks = <&gcc GCC_WCSS2G_CLK>,
149 <&gcc GCC_WCSS2G_REF_CLK>,
150 <&gcc GCC_WCSS2G_RTC_CLK>;
151 clock-names = "wifi_wcss_cmd",
152 "wifi_wcss_ref",
153 "wifi_wcss_rtc";
154 interrupts = <0 0x20 0x1>,
155 <0 0x21 0x1>,
156 <0 0x22 0x1>,
157 <0 0x23 0x1>,
158 <0 0x24 0x1>,
159 <0 0x25 0x1>,
160 <0 0x26 0x1>,
161 <0 0x27 0x1>,
162 <0 0x28 0x1>,
163 <0 0x29 0x1>,
164 <0 0x2a 0x1>,
165 <0 0x2b 0x1>,
166 <0 0x2c 0x1>,
167 <0 0x2d 0x1>,
168 <0 0x2e 0x1>,
169 <0 0x2f 0x1>,
170 <0 0xa8 0x0>;
171 interrupt-names = "msi0", "msi1", "msi2", "msi3",
172 "msi4", "msi5", "msi6", "msi7",
173 "msi8", "msi9", "msi10", "msi11",
174 "msi12", "msi13", "msi14", "msi15",
175 "legacy";
176 qcom,msi_addr = <0x0b006040>;
177 qcom,msi_base = <0x40>;
178 qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
179 qcom,coexist-support = <1>;
180 qcom,coexist-gpio-pin = <0x33>;
181 };
182
183 Example (to supply wcn3990 SoC wifi block details):
184
185 wifi@18000000 {
186 compatible = "qcom,wcn3990-wifi";
187 reg = <0x18800000 0x800000>;
188 reg-names = "membase";
189 clocks = <&clock_gcc clk_rf_clk2_pin>;
190 clock-names = "cxo_ref_clk_pin";
191 interrupts =
192 <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
193 <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
194 <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
195 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
196 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
197 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
198 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
199 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
200 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
201 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
202 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
203 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
204 vdd-0.8-cx-mx-supply = <&pm8998_l5>;
205 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
206 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
207 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
208 vdd-3.3-ch1-supply = <&vreg_l26a_3p3>;
209 memory-region = <&wifi_msa_mem>;
210 iommus = <&apps_smmu 0x0040 0x1>;
211 qcom,msa-fixed-perm;
212 wifi-firmware {
213 iommus = <&apps_iommu 0xc22 0x1>;
214 };
215 };
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