The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pci/intel-gw-pcie.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: PCIe RC controller on Intel Gateway SoCs
    8 
    9 maintainers:
   10   - Rahul Tanwar <rtanwar@maxlinear.com>
   11 
   12 select:
   13   properties:
   14     compatible:
   15       contains:
   16         const: intel,lgm-pcie
   17   required:
   18     - compatible
   19 
   20 allOf:
   21   - $ref: /schemas/pci/snps,dw-pcie.yaml#
   22 
   23 properties:
   24   compatible:
   25     items:
   26       - const: intel,lgm-pcie
   27       - const: snps,dw-pcie
   28 
   29   reg:
   30     items:
   31       - description: Controller control and status registers.
   32       - description: PCIe configuration registers.
   33       - description: Controller application registers.
   34 
   35   reg-names:
   36     items:
   37       - const: dbi
   38       - const: config
   39       - const: app
   40 
   41   ranges:
   42     maxItems: 1
   43 
   44   resets:
   45     maxItems: 1
   46 
   47   clocks:
   48     maxItems: 1
   49 
   50   phys:
   51     maxItems: 1
   52 
   53   phy-names:
   54     const: pcie
   55 
   56   reset-gpios:
   57     maxItems: 1
   58 
   59   num-lanes:
   60     maximum: 2
   61 
   62   max-link-speed:
   63     enum: [1, 2, 3, 4]
   64     default: 1
   65 
   66   reset-assert-ms:
   67     description: |
   68       Delay after asserting reset to the PCIe device.
   69     maximum: 500
   70     default: 100
   71 
   72 required:
   73   - compatible
   74   - reg
   75   - reg-names
   76   - ranges
   77   - resets
   78   - clocks
   79   - phys
   80   - phy-names
   81   - reset-gpios
   82   - '#interrupt-cells'
   83   - interrupt-map
   84   - interrupt-map-mask
   85 
   86 unevaluatedProperties: false
   87 
   88 examples:
   89   - |
   90     #include <dt-bindings/gpio/gpio.h>
   91     pcie10: pcie@d0e00000 {
   92       compatible = "intel,lgm-pcie", "snps,dw-pcie";
   93       device_type = "pci";
   94       #address-cells = <3>;
   95       #size-cells = <2>;
   96       reg = <0xd0e00000 0x1000>,
   97             <0xd2000000 0x800000>,
   98             <0xd0a41000 0x1000>;
   99       reg-names = "dbi", "config", "app";
  100       linux,pci-domain = <0>;
  101       max-link-speed = <4>;
  102       bus-range = <0x00 0x08>;
  103       #interrupt-cells = <1>;
  104       interrupt-map-mask = <0 0 0 0x7>;
  105       interrupt-map = <0 0 0 1 &ioapic1 27 1>,
  106                       <0 0 0 2 &ioapic1 28 1>,
  107                       <0 0 0 3 &ioapic1 29 1>,
  108                       <0 0 0 4 &ioapic1 30 1>;
  109       ranges = <0x02000000 0 0xd4000000 0xd4000000 0 0x04000000>;
  110       resets = <&rcu0 0x50 0>;
  111       clocks = <&cgu0 120>;
  112       phys = <&cb0phy0>;
  113       phy-names = "pcie";
  114       reset-assert-ms = <500>;
  115       reset-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  116       num-lanes = <2>;
  117     };

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