FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pci/pci-armada8k.txt

     * Marvell Armada 7K/8K PCIe interface
     
     This PCIe host controller is based on the Synopsys DesignWare PCIe IP
     and thus inherits all the common properties defined in snps,dw-pcie.yaml.
     
     Required properties:
     - compatible: "marvell,armada8k-pcie"
     - reg: must contain two register regions
        - the control register region
       - the config space region
    - reg-names:
       - "ctrl" for the control register region
       - "config" for the config space region
    - interrupts: Interrupt specifier for the PCIe controller
    - clocks: reference to the PCIe controller clocks
    - clock-names: mandatory if there is a second clock, in this case the
       name must be "core" for the first clock and "reg" for the second
       one
    
    Optional properties:
    - phys: phandle(s) to PHY node(s) following the generic PHY bindings.
            Either 1, 2 or 4 PHYs might be needed depending on the number of
            PCIe lanes.
    - phy-names: names of the PHYs corresponding to the number of lanes.
            Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
            2 PHYs.
    
    Example:
    
            pcie@f2600000 {
                    compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
                    reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;
                    reg-names = "ctrl", "config";
                    #address-cells = <3>;
                    #size-cells = <2>;
                    #interrupt-cells = <1>;
                    device_type = "pci";
                    dma-coherent;
    
                    bus-range = <0 0xff>;
                    ranges = <0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000       /* downstream I/O */
                              0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;    /* non-prefetchable memory */
                    interrupt-map-mask = <0 0 0 0>;
                    interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                    interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                    num-lanes = <1>;
                    clocks = <&cpm_syscon0 1 13>;
            };

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