1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm PCI express root complex
8
9 maintainers:
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Stanimir Varbanov <svarbanov@mm-sol.com>
12
13 description: |
14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare
15 PCIe IP.
16
17 properties:
18 compatible:
19 enum:
20 - qcom,pcie-ipq8064
21 - qcom,pcie-ipq8064-v2
22 - qcom,pcie-apq8064
23 - qcom,pcie-apq8084
24 - qcom,pcie-msm8996
25 - qcom,pcie-ipq4019
26 - qcom,pcie-ipq8074
27 - qcom,pcie-qcs404
28 - qcom,pcie-sc7280
29 - qcom,pcie-sc8180x
30 - qcom,pcie-sdm845
31 - qcom,pcie-sm8150
32 - qcom,pcie-sm8250
33 - qcom,pcie-sm8450-pcie0
34 - qcom,pcie-sm8450-pcie1
35 - qcom,pcie-ipq6018
36
37 reg:
38 minItems: 4
39 maxItems: 5
40
41 reg-names:
42 minItems: 4
43 maxItems: 5
44
45 interrupts:
46 minItems: 1
47 maxItems: 8
48
49 interrupt-names:
50 minItems: 1
51 maxItems: 8
52
53 # Common definitions for clocks, clock-names and reset.
54 # Platform constraints are described later.
55 clocks:
56 minItems: 3
57 maxItems: 12
58
59 clock-names:
60 minItems: 3
61 maxItems: 12
62
63 resets:
64 minItems: 1
65 maxItems: 12
66
67 resets-names:
68 minItems: 1
69 maxItems: 12
70
71 vdda-supply:
72 description: A phandle to the core analog power supply
73
74 vdda_phy-supply:
75 description: A phandle to the core analog power supply for PHY
76
77 vdda_refclk-supply:
78 description: A phandle to the core analog power supply for IC which generates reference clock
79
80 vddpe-3v3-supply:
81 description: A phandle to the PCIe endpoint power supply
82
83 phys:
84 maxItems: 1
85
86 phy-names:
87 items:
88 - const: pciephy
89
90 power-domains:
91 maxItems: 1
92
93 perst-gpios:
94 description: GPIO controlled connection to PERST# signal
95 maxItems: 1
96
97 wake-gpios:
98 description: GPIO controlled connection to WAKE# signal
99 maxItems: 1
100
101 required:
102 - compatible
103 - reg
104 - reg-names
105 - interrupts
106 - interrupt-names
107 - "#interrupt-cells"
108 - interrupt-map-mask
109 - interrupt-map
110 - clocks
111 - clock-names
112
113 allOf:
114 - $ref: /schemas/pci/pci-bus.yaml#
115 - if:
116 properties:
117 compatible:
118 contains:
119 enum:
120 - qcom,pcie-apq8064
121 - qcom,pcie-ipq4019
122 - qcom,pcie-ipq8064
123 - qcom,pcie-ipq8064v2
124 - qcom,pcie-ipq8074
125 - qcom,pcie-qcs404
126 then:
127 properties:
128 reg:
129 minItems: 4
130 maxItems: 4
131 reg-names:
132 items:
133 - const: dbi # DesignWare PCIe registers
134 - const: elbi # External local bus interface registers
135 - const: parf # Qualcomm specific registers
136 - const: config # PCIe configuration space
137
138 - if:
139 properties:
140 compatible:
141 contains:
142 enum:
143 - qcom,pcie-ipq6018
144 then:
145 properties:
146 reg:
147 minItems: 5
148 maxItems: 5
149 reg-names:
150 items:
151 - const: dbi # DesignWare PCIe registers
152 - const: elbi # External local bus interface registers
153 - const: atu # ATU address space
154 - const: parf # Qualcomm specific registers
155 - const: config # PCIe configuration space
156
157 - if:
158 properties:
159 compatible:
160 contains:
161 enum:
162 - qcom,pcie-apq8084
163 - qcom,pcie-msm8996
164 - qcom,pcie-sdm845
165 then:
166 properties:
167 reg:
168 minItems: 4
169 maxItems: 4
170 reg-names:
171 items:
172 - const: parf # Qualcomm specific registers
173 - const: dbi # DesignWare PCIe registers
174 - const: elbi # External local bus interface registers
175 - const: config # PCIe configuration space
176
177 - if:
178 properties:
179 compatible:
180 contains:
181 enum:
182 - qcom,pcie-sc7280
183 - qcom,pcie-sc8180x
184 - qcom,pcie-sm8250
185 - qcom,pcie-sm8450-pcie0
186 - qcom,pcie-sm8450-pcie1
187 then:
188 properties:
189 reg:
190 minItems: 5
191 maxItems: 5
192 reg-names:
193 items:
194 - const: parf # Qualcomm specific registers
195 - const: dbi # DesignWare PCIe registers
196 - const: elbi # External local bus interface registers
197 - const: atu # ATU address space
198 - const: config # PCIe configuration space
199
200 - if:
201 properties:
202 compatible:
203 contains:
204 enum:
205 - qcom,pcie-apq8064
206 - qcom,pcie-ipq8064
207 - qcom,pcie-ipq8064v2
208 then:
209 properties:
210 clocks:
211 minItems: 3
212 maxItems: 5
213 clock-names:
214 minItems: 3
215 items:
216 - const: core # Clocks the pcie hw block
217 - const: iface # Configuration AHB clock
218 - const: phy # Clocks the pcie PHY block
219 - const: aux # Clocks the pcie AUX block, not on apq8064
220 - const: ref # Clocks the pcie ref block, not on apq8064
221 resets:
222 minItems: 5
223 maxItems: 6
224 reset-names:
225 minItems: 5
226 items:
227 - const: axi # AXI reset
228 - const: ahb # AHB reset
229 - const: por # POR reset
230 - const: pci # PCI reset
231 - const: phy # PHY reset
232 - const: ext # EXT reset, not on apq8064
233 required:
234 - vdda-supply
235 - vdda_phy-supply
236 - vdda_refclk-supply
237
238 - if:
239 properties:
240 compatible:
241 contains:
242 enum:
243 - qcom,pcie-apq8084
244 then:
245 properties:
246 clocks:
247 minItems: 4
248 maxItems: 4
249 clock-names:
250 items:
251 - const: iface # Configuration AHB clock
252 - const: master_bus # Master AXI clock
253 - const: slave_bus # Slave AXI clock
254 - const: aux # Auxiliary (AUX) clock
255 resets:
256 maxItems: 1
257 reset-names:
258 items:
259 - const: core # Core reset
260
261 - if:
262 properties:
263 compatible:
264 contains:
265 enum:
266 - qcom,pcie-ipq4019
267 then:
268 properties:
269 clocks:
270 minItems: 3
271 maxItems: 3
272 clock-names:
273 items:
274 - const: aux # Auxiliary (AUX) clock
275 - const: master_bus # Master AXI clock
276 - const: slave_bus # Slave AXI clock
277 resets:
278 minItems: 12
279 maxItems: 12
280 reset-names:
281 items:
282 - const: axi_m # AXI master reset
283 - const: axi_s # AXI slave reset
284 - const: pipe # PIPE reset
285 - const: axi_m_vmid # VMID reset
286 - const: axi_s_xpu # XPU reset
287 - const: parf # PARF reset
288 - const: phy # PHY reset
289 - const: axi_m_sticky # AXI sticky reset
290 - const: pipe_sticky # PIPE sticky reset
291 - const: pwr # PWR reset
292 - const: ahb # AHB reset
293 - const: phy_ahb # PHY AHB reset
294
295 - if:
296 properties:
297 compatible:
298 contains:
299 enum:
300 - qcom,pcie-msm8996
301 then:
302 oneOf:
303 - properties:
304 clock-names:
305 items:
306 - const: pipe # Pipe Clock driving internal logic
307 - const: aux # Auxiliary (AUX) clock
308 - const: cfg # Configuration clock
309 - const: bus_master # Master AXI clock
310 - const: bus_slave # Slave AXI clock
311 - properties:
312 clock-names:
313 items:
314 - const: pipe # Pipe Clock driving internal logic
315 - const: bus_master # Master AXI clock
316 - const: bus_slave # Slave AXI clock
317 - const: cfg # Configuration clock
318 - const: aux # Auxiliary (AUX) clock
319 properties:
320 clocks:
321 minItems: 5
322 maxItems: 5
323 resets: false
324 reset-names: false
325
326 - if:
327 properties:
328 compatible:
329 contains:
330 enum:
331 - qcom,pcie-ipq8074
332 then:
333 properties:
334 clocks:
335 minItems: 5
336 maxItems: 5
337 clock-names:
338 items:
339 - const: iface # PCIe to SysNOC BIU clock
340 - const: axi_m # AXI Master clock
341 - const: axi_s # AXI Slave clock
342 - const: ahb # AHB clock
343 - const: aux # Auxiliary clock
344 resets:
345 minItems: 7
346 maxItems: 7
347 reset-names:
348 items:
349 - const: pipe # PIPE reset
350 - const: sleep # Sleep reset
351 - const: sticky # Core Sticky reset
352 - const: axi_m # AXI Master reset
353 - const: axi_s # AXI Slave reset
354 - const: ahb # AHB Reset
355 - const: axi_m_sticky # AXI Master Sticky reset
356
357 - if:
358 properties:
359 compatible:
360 contains:
361 enum:
362 - qcom,pcie-ipq6018
363 then:
364 properties:
365 clocks:
366 minItems: 5
367 maxItems: 5
368 clock-names:
369 items:
370 - const: iface # PCIe to SysNOC BIU clock
371 - const: axi_m # AXI Master clock
372 - const: axi_s # AXI Slave clock
373 - const: axi_bridge # AXI bridge clock
374 - const: rchng
375 resets:
376 minItems: 8
377 maxItems: 8
378 reset-names:
379 items:
380 - const: pipe # PIPE reset
381 - const: sleep # Sleep reset
382 - const: sticky # Core Sticky reset
383 - const: axi_m # AXI Master reset
384 - const: axi_s # AXI Slave reset
385 - const: ahb # AHB Reset
386 - const: axi_m_sticky # AXI Master Sticky reset
387 - const: axi_s_sticky # AXI Slave Sticky reset
388
389 - if:
390 properties:
391 compatible:
392 contains:
393 enum:
394 - qcom,pcie-qcs404
395 then:
396 properties:
397 clocks:
398 minItems: 4
399 maxItems: 4
400 clock-names:
401 items:
402 - const: iface # AHB clock
403 - const: aux # Auxiliary clock
404 - const: master_bus # AXI Master clock
405 - const: slave_bus # AXI Slave clock
406 resets:
407 minItems: 6
408 maxItems: 6
409 reset-names:
410 items:
411 - const: axi_m # AXI Master reset
412 - const: axi_s # AXI Slave reset
413 - const: axi_m_sticky # AXI Master Sticky reset
414 - const: pipe_sticky # PIPE sticky reset
415 - const: pwr # PWR reset
416 - const: ahb # AHB reset
417
418 - if:
419 properties:
420 compatible:
421 contains:
422 enum:
423 - qcom,pcie-sc7280
424 then:
425 properties:
426 clocks:
427 minItems: 11
428 maxItems: 11
429 clock-names:
430 items:
431 - const: pipe # PIPE clock
432 - const: pipe_mux # PIPE MUX
433 - const: phy_pipe # PIPE output clock
434 - const: ref # REFERENCE clock
435 - const: aux # Auxiliary clock
436 - const: cfg # Configuration clock
437 - const: bus_master # Master AXI clock
438 - const: bus_slave # Slave AXI clock
439 - const: slave_q2a # Slave Q2A clock
440 - const: tbu # PCIe TBU clock
441 - const: ddrss_sf_tbu # PCIe SF TBU clock
442 resets:
443 maxItems: 1
444 reset-names:
445 items:
446 - const: pci # PCIe core reset
447
448 - if:
449 properties:
450 compatible:
451 contains:
452 enum:
453 - qcom,pcie-sdm845
454 then:
455 oneOf:
456 # Unfortunately the "optional" ref clock is used in the middle of the list
457 - properties:
458 clocks:
459 minItems: 8
460 maxItems: 8
461 clock-names:
462 items:
463 - const: pipe # PIPE clock
464 - const: aux # Auxiliary clock
465 - const: cfg # Configuration clock
466 - const: bus_master # Master AXI clock
467 - const: bus_slave # Slave AXI clock
468 - const: slave_q2a # Slave Q2A clock
469 - const: ref # REFERENCE clock
470 - const: tbu # PCIe TBU clock
471 - properties:
472 clocks:
473 minItems: 7
474 maxItems: 7
475 clock-names:
476 items:
477 - const: pipe # PIPE clock
478 - const: aux # Auxiliary clock
479 - const: cfg # Configuration clock
480 - const: bus_master # Master AXI clock
481 - const: bus_slave # Slave AXI clock
482 - const: slave_q2a # Slave Q2A clock
483 - const: tbu # PCIe TBU clock
484 properties:
485 resets:
486 maxItems: 1
487 reset-names:
488 items:
489 - const: pci # PCIe core reset
490
491 - if:
492 properties:
493 compatible:
494 contains:
495 enum:
496 - qcom,pcie-sc8180x
497 - qcom,pcie-sm8150
498 - qcom,pcie-sm8250
499 then:
500 oneOf:
501 # Unfortunately the "optional" ref clock is used in the middle of the list
502 - properties:
503 clocks:
504 minItems: 9
505 maxItems: 9
506 clock-names:
507 items:
508 - const: pipe # PIPE clock
509 - const: aux # Auxiliary clock
510 - const: cfg # Configuration clock
511 - const: bus_master # Master AXI clock
512 - const: bus_slave # Slave AXI clock
513 - const: slave_q2a # Slave Q2A clock
514 - const: ref # REFERENCE clock
515 - const: tbu # PCIe TBU clock
516 - const: ddrss_sf_tbu # PCIe SF TBU clock
517 - properties:
518 clocks:
519 minItems: 8
520 maxItems: 8
521 clock-names:
522 items:
523 - const: pipe # PIPE clock
524 - const: aux # Auxiliary clock
525 - const: cfg # Configuration clock
526 - const: bus_master # Master AXI clock
527 - const: bus_slave # Slave AXI clock
528 - const: slave_q2a # Slave Q2A clock
529 - const: tbu # PCIe TBU clock
530 - const: ddrss_sf_tbu # PCIe SF TBU clock
531 properties:
532 resets:
533 maxItems: 1
534 reset-names:
535 items:
536 - const: pci # PCIe core reset
537
538 - if:
539 properties:
540 compatible:
541 contains:
542 enum:
543 - qcom,pcie-sm8450-pcie0
544 then:
545 properties:
546 clocks:
547 minItems: 12
548 maxItems: 12
549 clock-names:
550 items:
551 - const: pipe # PIPE clock
552 - const: pipe_mux # PIPE MUX
553 - const: phy_pipe # PIPE output clock
554 - const: ref # REFERENCE clock
555 - const: aux # Auxiliary clock
556 - const: cfg # Configuration clock
557 - const: bus_master # Master AXI clock
558 - const: bus_slave # Slave AXI clock
559 - const: slave_q2a # Slave Q2A clock
560 - const: ddrss_sf_tbu # PCIe SF TBU clock
561 - const: aggre0 # Aggre NoC PCIe0 AXI clock
562 - const: aggre1 # Aggre NoC PCIe1 AXI clock
563 resets:
564 maxItems: 1
565 reset-names:
566 items:
567 - const: pci # PCIe core reset
568
569 - if:
570 properties:
571 compatible:
572 contains:
573 enum:
574 - qcom,pcie-sm8450-pcie1
575 then:
576 properties:
577 clocks:
578 minItems: 11
579 maxItems: 11
580 clock-names:
581 items:
582 - const: pipe # PIPE clock
583 - const: pipe_mux # PIPE MUX
584 - const: phy_pipe # PIPE output clock
585 - const: ref # REFERENCE clock
586 - const: aux # Auxiliary clock
587 - const: cfg # Configuration clock
588 - const: bus_master # Master AXI clock
589 - const: bus_slave # Slave AXI clock
590 - const: slave_q2a # Slave Q2A clock
591 - const: ddrss_sf_tbu # PCIe SF TBU clock
592 - const: aggre1 # Aggre NoC PCIe1 AXI clock
593 resets:
594 maxItems: 1
595 reset-names:
596 items:
597 - const: pci # PCIe core reset
598
599 - if:
600 not:
601 properties:
602 compatible:
603 contains:
604 enum:
605 - qcom,pcie-apq8064
606 - qcom,pcie-ipq4019
607 - qcom,pcie-ipq8064
608 - qcom,pcie-ipq8064v2
609 - qcom,pcie-ipq8074
610 - qcom,pcie-qcs404
611 then:
612 required:
613 - power-domains
614
615 - if:
616 not:
617 properties:
618 compatible:
619 contains:
620 enum:
621 - qcom,pcie-msm8996
622 then:
623 required:
624 - resets
625 - reset-names
626
627 # Newer chipsets support either 1 or 8 MSI vectors
628 # On older chipsets it's always 1 MSI vector
629 - if:
630 properties:
631 compatible:
632 contains:
633 enum:
634 - qcom,pcie-msm8996
635 - qcom,pcie-sc7280
636 - qcom,pcie-sc8180x
637 - qcom,pcie-sdm845
638 - qcom,pcie-sm8150
639 - qcom,pcie-sm8250
640 - qcom,pcie-sm8450-pcie0
641 - qcom,pcie-sm8450-pcie1
642 then:
643 oneOf:
644 - properties:
645 interrupts:
646 maxItems: 1
647 interrupt-names:
648 items:
649 - const: msi
650 - properties:
651 interrupts:
652 minItems: 8
653 interrupt-names:
654 items:
655 - const: msi0
656 - const: msi1
657 - const: msi2
658 - const: msi3
659 - const: msi4
660 - const: msi5
661 - const: msi6
662 - const: msi7
663 else:
664 properties:
665 interrupts:
666 maxItems: 1
667 interrupt-names:
668 items:
669 - const: msi
670
671 unevaluatedProperties: false
672
673 examples:
674 - |
675 #include <dt-bindings/interrupt-controller/arm-gic.h>
676 pcie@1b500000 {
677 compatible = "qcom,pcie-ipq8064";
678 reg = <0x1b500000 0x1000>,
679 <0x1b502000 0x80>,
680 <0x1b600000 0x100>,
681 <0x0ff00000 0x100000>;
682 reg-names = "dbi", "elbi", "parf", "config";
683 device_type = "pci";
684 linux,pci-domain = <0>;
685 bus-range = <0x00 0xff>;
686 num-lanes = <1>;
687 #address-cells = <3>;
688 #size-cells = <2>;
689 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
690 <0x82000000 0 0 0x08000000 0 0x07e00000>;
691 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
692 interrupt-names = "msi";
693 #interrupt-cells = <1>;
694 interrupt-map-mask = <0 0 0 0x7>;
695 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
696 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,
697 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,
698 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;
699 clocks = <&gcc 41>,
700 <&gcc 43>,
701 <&gcc 44>,
702 <&gcc 42>,
703 <&gcc 248>;
704 clock-names = "core", "iface", "phy", "aux", "ref";
705 resets = <&gcc 27>,
706 <&gcc 26>,
707 <&gcc 25>,
708 <&gcc 24>,
709 <&gcc 23>,
710 <&gcc 22>;
711 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
712 pinctrl-0 = <&pcie_pins_default>;
713 pinctrl-names = "default";
714 vdda-supply = <&pm8921_s3>;
715 vdda_phy-supply = <&pm8921_lvs6>;
716 vdda_refclk-supply = <&ext_3p3v>;
717 };
718 - |
719 #include <dt-bindings/interrupt-controller/arm-gic.h>
720 #include <dt-bindings/gpio/gpio.h>
721 pcie@fc520000 {
722 compatible = "qcom,pcie-apq8084";
723 reg = <0xfc520000 0x2000>,
724 <0xff000000 0x1000>,
725 <0xff001000 0x1000>,
726 <0xff002000 0x2000>;
727 reg-names = "parf", "dbi", "elbi", "config";
728 device_type = "pci";
729 linux,pci-domain = <0>;
730 bus-range = <0x00 0xff>;
731 num-lanes = <1>;
732 #address-cells = <3>;
733 #size-cells = <2>;
734 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>,
735 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>;
736 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
737 interrupt-names = "msi";
738 #interrupt-cells = <1>;
739 interrupt-map-mask = <0 0 0 0x7>;
740 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
741 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>,
742 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>,
743 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>;
744 clocks = <&gcc 324>,
745 <&gcc 325>,
746 <&gcc 327>,
747 <&gcc 323>;
748 clock-names = "iface", "master_bus", "slave_bus", "aux";
749 resets = <&gcc 81>;
750 reset-names = "core";
751 power-domains = <&gcc 1>;
752 vdda-supply = <&pma8084_l3>;
753 phys = <&pciephy0>;
754 phy-names = "pciephy";
755 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;
756 pinctrl-0 = <&pcie0_pins_default>;
757 pinctrl-names = "default";
758 };
759 ...
Cache object: 3811cf64308feb4a70b7442b8311c209
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