The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pci/rcar-pci.txt

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    1 * Renesas R-Car PCIe interface
    2 
    3 Required properties:
    4 compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC;
    5             "renesas,pcie-r8a7743" for the R8A7743 SoC;
    6             "renesas,pcie-r8a7744" for the R8A7744 SoC;
    7             "renesas,pcie-r8a774a1" for the R8A774A1 SoC;
    8             "renesas,pcie-r8a774b1" for the R8A774B1 SoC;
    9             "renesas,pcie-r8a774c0" for the R8A774C0 SoC;
   10             "renesas,pcie-r8a7779" for the R8A7779 SoC;
   11             "renesas,pcie-r8a7790" for the R8A7790 SoC;
   12             "renesas,pcie-r8a7791" for the R8A7791 SoC;
   13             "renesas,pcie-r8a7793" for the R8A7793 SoC;
   14             "renesas,pcie-r8a7795" for the R8A7795 SoC;
   15             "renesas,pcie-r8a7796" for the R8A77960 SoC;
   16             "renesas,pcie-r8a77961" for the R8A77961 SoC;
   17             "renesas,pcie-r8a77980" for the R8A77980 SoC;
   18             "renesas,pcie-r8a77990" for the R8A77990 SoC;
   19             "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
   20                                      RZ/G1 compatible device.
   21             "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 or
   22                                      RZ/G2 compatible device.
   23 
   24             When compatible with the generic version, nodes must list the
   25             SoC-specific version corresponding to the platform first
   26             followed by the generic version.
   27 
   28 - reg: base address and length of the PCIe controller registers.
   29 - #address-cells: set to <3>
   30 - #size-cells: set to <2>
   31 - bus-range: PCI bus numbers covered
   32 - device_type: set to "pci"
   33 - ranges: ranges for the PCI memory and I/O regions.
   34 - dma-ranges: ranges for the inbound memory regions.
   35 - interrupts: two interrupt sources for MSI interrupts, followed by interrupt
   36         source for hardware related interrupts (e.g. link speed change).
   37 - #interrupt-cells: set to <1>
   38 - interrupt-map-mask and interrupt-map: standard PCI properties
   39         to define the mapping of the PCIe interface to interrupt numbers.
   40 - clocks: from common clock binding: clock specifiers for the PCIe controller
   41         and PCIe bus clocks.
   42 - clock-names: from common clock binding: should be "pcie" and "pcie_bus".
   43 
   44 Optional properties:
   45 - phys: from common PHY binding: PHY phandle and specifier (only make sense
   46         for R-Car gen3 SoCs where the PCIe PHYs have their own register blocks).
   47 - phy-names: from common PHY binding: should be "pcie".
   48 
   49 Example:
   50 
   51 SoC-specific DT Entry:
   52 
   53         pcie: pcie@fe000000 {
   54                 compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2";
   55                 reg = <0 0xfe000000 0 0x80000>;
   56                 #address-cells = <3>;
   57                 #size-cells = <2>;
   58                 bus-range = <0x00 0xff>;
   59                 device_type = "pci";
   60                 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
   61                           0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
   62                           0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
   63                           0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
   64                 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000
   65                               0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>;
   66                 interrupts = <0 116 4>, <0 117 4>, <0 118 4>;
   67                 #interrupt-cells = <1>;
   68                 interrupt-map-mask = <0 0 0 0>;
   69                 interrupt-map = <0 0 0 0 &gic 0 116 4>;
   70                 clocks = <&mstp3_clks R8A7791_CLK_PCIE>, <&pcie_bus_clk>;
   71                 clock-names = "pcie", "pcie_bus";
   72         };

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