renesas,pci-rcar-gen2.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/pci/renesas,pci-rcar-gen2.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Renesas AHB to PCI bridge
    8 
    9 maintainers:
   10   - Marek Vasut <marek.vasut+renesas@gmail.com>
   11   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
   12 
   13 description: |
   14   This is the bridge used internally to connect the USB controllers to the
   15   AHB. There is one bridge instance per USB port connected to the internal
   16   OHCI and EHCI controllers.
   17 
   18 properties:
   19   compatible:
   20     oneOf:
   21       - items:
   22           - enum:
   23               - renesas,pci-r8a7742      # RZ/G1H
   24               - renesas,pci-r8a7743      # RZ/G1M
   25               - renesas,pci-r8a7744      # RZ/G1N
   26               - renesas,pci-r8a7745      # RZ/G1E
   27               - renesas,pci-r8a7790      # R-Car H2
   28               - renesas,pci-r8a7791      # R-Car M2-W
   29               - renesas,pci-r8a7793      # R-Car M2-N
   30               - renesas,pci-r8a7794      # R-Car E2
   31           - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
   32       - items:
   33           - enum:
   34               - renesas,pci-r9a06g032     # RZ/N1D
   35           - const: renesas,pci-rzn1       # RZ/N1
   36 
   37   reg:
   38     items:
   39       - description: Operational registers for the OHCI/EHCI controllers.
   40       - description: Bridge configuration and control registers.
   41 
   42   interrupts:
   43     maxItems: 1
   44 
   45   clocks: true
   46 
   47   clock-names: true
   48 
   49   resets:
   50     maxItems: 1
   51 
   52   power-domains:
   53     maxItems: 1
   54 
   55   bus-range:
   56     description: |
   57       The PCI bus number range; as this is a single bus, the range
   58       should be specified as the same value twice.
   59 
   60   dma-ranges:
   61     description: |
   62       A single range for the inbound memory region. If not supplied,
   63       defaults to 1GiB at 0x40000000. Note there are hardware restrictions on
   64       the allowed combinations of address and size.
   65     maxItems: 1
   66 
   67 patternProperties:
   68   'usb@[0-1],0':
   69     type: object
   70 
   71     description:
   72       This a USB controller PCI device
   73 
   74     properties:
   75       reg:
   76         description:
   77           Identify the correct bus, device and function number in the
   78           form <bdf 0 0 0 0>.
   79 
   80         items:
   81           minItems: 5
   82           maxItems: 5
   83 
   84       phys:
   85         description:
   86           Reference to the USB phy
   87         maxItems: 1
   88 
   89       phy-names:
   90         maxItems: 1
   91 
   92     required:
   93       - reg
   94       - phys
   95       - phy-names
   96 
   97     unevaluatedProperties: false
   98 
   99 required:
  100   - compatible
  101   - reg
  102   - interrupts
  103   - interrupt-map
  104   - interrupt-map-mask
  105   - clocks
  106   - power-domains
  107   - bus-range
  108   - "#address-cells"
  109   - "#size-cells"
  110   - "#interrupt-cells"
  111 
  112 allOf:
  113   - $ref: /schemas/pci/pci-bus.yaml#
  114 
  115   - if:
  116       properties:
  117         compatible:
  118           contains:
  119             enum:
  120               - renesas,pci-rzn1
  121     then:
  122       properties:
  123         clocks:
  124           items:
  125             - description: Internal bus clock (AHB) for HOST
  126             - description: Internal bus clock (AHB) Power Management
  127             - description: PCI clock for USB subsystem
  128         clock-names:
  129           items:
  130             - const: hclkh
  131             - const: hclkpm
  132             - const: pciclk
  133       required:
  134         - clock-names
  135     else:
  136       properties:
  137         clocks:
  138           items:
  139             - description: Device clock
  140         clock-names:
  141           items:
  142             - const: pclk
  143       required:
  144         - resets
  145 
  146 unevaluatedProperties: false
  147 
  148 examples:
  149   - |
  150     #include <dt-bindings/interrupt-controller/arm-gic.h>
  151     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
  152     #include <dt-bindings/power/r8a7790-sysc.h>
  153 
  154     pci@ee090000  {
  155         compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
  156         device_type = "pci";
  157         reg = <0xee090000 0xc00>,
  158               <0xee080000 0x1100>;
  159         clocks = <&cpg CPG_MOD 703>;
  160         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
  161         resets = <&cpg 703>;
  162         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
  163 
  164         bus-range = <0 0>;
  165         #address-cells = <3>;
  166         #size-cells = <2>;
  167         #interrupt-cells = <1>;
  168         ranges = <0x02000000 0 0xee080000 0xee080000 0 0x00010000>;
  169         dma-ranges = <0x42000000 0 0x40000000 0x40000000 0 0x40000000>;
  170         interrupt-map-mask = <0xf800 0 0 0x7>;
  171         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
  172                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
  173                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
  174 
  175         usb@1,0 {
  176             reg = <0x800 0 0 0 0>;
  177             phys = <&usb0 0>;
  178             phy-names = "usb";
  179         };
  180 
  181         usb@2,0 {
  182             reg = <0x1000 0 0 0 0>;
  183             phys = <&usb0 0>;
  184             phy-names = "usb";
  185         };
  186     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pci/renesas,pci-rcar-gen2.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pci/renesas,pci-rcar-gen2.yaml