snps,dw-pcie.yaml

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    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Synopsys DesignWare PCIe interface
    8 
    9 maintainers:
   10   - Jingoo Han <jingoohan1@gmail.com>
   11   - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
   12 
   13 description: |
   14   Synopsys DesignWare PCIe host controller
   15 
   16 allOf:
   17   - $ref: /schemas/pci/pci-bus.yaml#
   18 
   19 properties:
   20   compatible:
   21     anyOf:
   22       - {}
   23       - const: snps,dw-pcie
   24 
   25   reg:
   26     description: |
   27       It should contain Data Bus Interface (dbi) and config registers for all
   28       versions.
   29       For designware core version >= 4.80, it may contain ATU address space.
   30     minItems: 2
   31     maxItems: 5
   32 
   33   reg-names:
   34     minItems: 2
   35     maxItems: 5
   36     items:
   37       enum: [ dbi, dbi2, config, atu, atu_dma, app, appl, elbi, mgmt, ctrl,
   38               parf, cfg, link, ulreg, smu, mpu, apb, phy ]
   39 
   40   num-lanes:
   41     description: |
   42       number of lanes to use (this property should be specified unless
   43       the link is brought already up in firmware)
   44     maximum: 16
   45 
   46   reset-gpio:
   47     description: GPIO pin number of PERST# signal
   48     maxItems: 1
   49     deprecated: true
   50 
   51   reset-gpios:
   52     description: GPIO controlled connection to PERST# signal
   53     maxItems: 1
   54 
   55   interrupts: true
   56 
   57   interrupt-names: true
   58 
   59   clocks: true
   60 
   61   snps,enable-cdm-check:
   62     type: boolean
   63     description: |
   64       This is a boolean property and if present enables
   65       automatic checking of CDM (Configuration Dependent Module) registers
   66       for data corruption. CDM registers include standard PCIe configuration
   67       space registers, Port Logic registers, DMA and iATU (internal Address
   68       Translation Unit) registers.
   69 
   70   num-viewport:
   71     $ref: /schemas/types.yaml#/definitions/uint32
   72     maximum: 256
   73     description: |
   74       number of view ports configured in hardware. If a platform
   75       does not specify it, the driver autodetects it.
   76     deprecated: true
   77 
   78 additionalProperties: true
   79 
   80 required:
   81   - reg
   82   - reg-names
   83   - compatible
   84 
   85 examples:
   86   - |
   87     bus {
   88       #address-cells = <1>;
   89       #size-cells = <1>;
   90       pcie@dfc00000 {
   91         device_type = "pci";
   92         compatible = "snps,dw-pcie";
   93         reg = <0xdfc00000 0x0001000>, /* IP registers */
   94               <0xd0000000 0x0002000>; /* Configuration space */
   95         reg-names = "dbi", "config";
   96         #address-cells = <3>;
   97         #size-cells = <2>;
   98         ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000>,
   99                  <0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;
  100         interrupts = <25>, <24>;
  101         #interrupt-cells = <1>;
  102         num-lanes = <1>;
  103       };
  104     };

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sys/contrib/device-tree/Bindings/pci/snps,dw-pcie.yaml