The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pci/ti-pci.txt

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    1 TI PCI Controllers
    2 
    3 PCIe DesignWare Controller
    4  - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
    5                Should be "ti,dra7-pcie-ep" for EP (deprecated)
    6                Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
    7                Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
    8                Should be "ti,dra726-pcie-rc" for dra72x in RC mode
    9                Should be "ti,dra726-pcie-ep" for dra72x in EP mode
   10  - phys : list of PHY specifiers (used by generic PHY framework)
   11  - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
   12                number of PHYs as specified in *phys* property.
   13  - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
   14                where <X> is the instance number of the pcie from the HW spec.
   15  - num-lanes as specified in ../snps,dw-pcie.yaml
   16  - ti,syscon-lane-sel : phandle/offset pair. Phandle to the system control
   17                         module and the register offset to specify lane
   18                         selection.
   19 
   20 HOST MODE
   21 =========
   22  - reg : Two register ranges as listed in the reg-names property
   23  - reg-names : The first entry must be "ti-conf" for the TI-specific registers
   24                The second entry must be "rc-dbics" for the DesignWare PCIe
   25                registers
   26                The third entry must be "config" for the PCIe configuration space
   27  - interrupts : Two interrupt entries must be specified. The first one is for
   28                 main interrupt line and the second for MSI interrupt line.
   29  - #address-cells,
   30    #size-cells,
   31    #interrupt-cells,
   32    device_type,
   33    ranges,
   34    interrupt-map-mask,
   35    interrupt-map : as specified in ../snps,dw-pcie.yaml
   36  - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
   37                                should contain the register offset within syscon
   38                                and the 2nd argument should contain the bit field
   39                                for setting the bit to enable unaligned
   40                                access.
   41 
   42 DEVICE MODE
   43 ===========
   44  - reg : Four register ranges as listed in the reg-names property
   45  - reg-names : "ti-conf" for the TI-specific registers
   46                "ep_dbics" for the standard configuration registers as
   47                 they are locally accessed within the DIF CS space
   48                "ep_dbics2" for the standard configuration registers as
   49                 they are locally accessed within the DIF CS2 space
   50                "addr_space" used to map remote RC address space
   51  - interrupts : one interrupt entries must be specified for main interrupt.
   52  - num-ib-windows : number of inbound address translation windows
   53  - num-ob-windows : number of outbound address translation windows
   54  - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
   55                                should contain the register offset within syscon
   56                                and the 2nd argument should contain the bit field
   57                                for setting the bit to enable unaligned
   58                                access.
   59 
   60 Optional Property:
   61  - gpios : Should be added if a GPIO line is required to drive PERST# line
   62 
   63 NOTE: Two DT nodes may be added for each PCI controller; one for host
   64 mode and another for device mode. So in order for PCI to
   65 work in host mode, EP mode DT node should be disabled and in order to PCI to
   66 work in EP mode, host mode DT node should be disabled. Host mode and EP
   67 mode are mutually exclusive.
   68 
   69 Example:
   70 axi {
   71         compatible = "simple-bus";
   72         #size-cells = <1>;
   73         #address-cells = <1>;
   74         ranges = <0x51000000 0x51000000 0x3000
   75                   0x0        0x20000000 0x10000000>;
   76         pcie@51000000 {
   77                 compatible = "ti,dra7-pcie";
   78                 reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
   79                 reg-names = "rc_dbics", "ti_conf", "config";
   80                 interrupts = <0 232 0x4>, <0 233 0x4>;
   81                 #address-cells = <3>;
   82                 #size-cells = <2>;
   83                 device_type = "pci";
   84                 ranges = <0x81000000 0 0          0x03000 0 0x00010000
   85                           0x82000000 0 0x20013000 0x13000 0 0xffed000>;
   86                 #interrupt-cells = <1>;
   87                 num-lanes = <1>;
   88                 ti,hwmods = "pcie1";
   89                 phys = <&pcie1_phy>;
   90                 phy-names = "pcie-phy0";
   91                 interrupt-map-mask = <0 0 0 7>;
   92                 interrupt-map = <0 0 0 1 &pcie_intc 1>,
   93                                 <0 0 0 2 &pcie_intc 2>,
   94                                 <0 0 0 3 &pcie_intc 3>,
   95                                 <0 0 0 4 &pcie_intc 4>;
   96                 pcie_intc: interrupt-controller {
   97                         interrupt-controller;
   98                         #address-cells = <0>;
   99                         #interrupt-cells = <1>;
  100                 };
  101         };
  102 };

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