arm,cmn.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 # Copyright 2020 Arm Ltd.
    3 %YAML 1.2
    4 ---
    5 $id: http://devicetree.org/schemas/perf/arm,cmn.yaml#
    6 $schema: http://devicetree.org/meta-schemas/core.yaml#
    7 
    8 title: Arm CMN (Coherent Mesh Network) Performance Monitors
    9 
   10 maintainers:
   11   - Robin Murphy <robin.murphy@arm.com>
   12 
   13 properties:
   14   compatible:
   15     enum:
   16       - arm,cmn-600
   17       - arm,cmn-650
   18       - arm,cmn-700
   19       - arm,ci-700
   20 
   21   reg:
   22     items:
   23       - description: Physical address of the base (PERIPHBASE) and
   24           size of the configuration address space.
   25 
   26   interrupts:
   27     minItems: 1
   28     items:
   29       - description: Overflow interrupt for DTC0
   30       - description: Overflow interrupt for DTC1
   31       - description: Overflow interrupt for DTC2
   32       - description: Overflow interrupt for DTC3
   33     description: One interrupt for each DTC domain implemented must
   34       be specified, in order. DTC0 is always present.
   35 
   36   arm,root-node:
   37     $ref: /schemas/types.yaml#/definitions/uint32
   38     description: Offset from PERIPHBASE of CMN-600's configuration
   39       discovery node (see TRM definition of ROOTNODEBASE). Not
   40       relevant for newer CMN/CI products.
   41 
   42 required:
   43   - compatible
   44   - reg
   45   - interrupts
   46 
   47 if:
   48   properties:
   49     compatible:
   50       contains:
   51         const: arm,cmn-600
   52 then:
   53   required:
   54     - arm,root-node
   55 
   56 additionalProperties: false
   57 
   58 examples:
   59   - |
   60     #include <dt-bindings/interrupt-controller/arm-gic.h>
   61     #include <dt-bindings/interrupt-controller/irq.h>
   62     pmu@50000000 {
   63         compatible = "arm,cmn-600";
   64         reg = <0x50000000 0x4000000>;
   65         /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */
   66         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
   67         arm,root-node = <0x104000>;
   68     };
   69 ...

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