arm,smmu-v3-pmcg.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/perf/arm,smmu-v3-pmcg.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Arm SMMUv3 Performance Monitor Counter Group
    8 
    9 maintainers:
   10   - Will Deacon <will@kernel.org>
   11   - Robin Murphy <robin.murphy@arm.com>
   12 
   13 description: |
   14   An SMMUv3 may have several Performance Monitor Counter Group (PMCG).
   15   They are standalone performance monitoring units that support both
   16   architected and IMPLEMENTATION DEFINED event counters.
   17 
   18 properties:
   19   $nodename:
   20     pattern: "^pmu@[0-9a-f]*"
   21   compatible:
   22     oneOf:
   23       - items:
   24           - const: arm,mmu-600-pmcg
   25           - const: arm,smmu-v3-pmcg
   26       - const: arm,smmu-v3-pmcg
   27 
   28   reg:
   29     items:
   30       - description: Register page 0
   31       - description: Register page 1, if SMMU_PMCG_CFGR.RELOC_CTRS = 1
   32     minItems: 1
   33 
   34   interrupts:
   35     maxItems: 1
   36 
   37   msi-parent: true
   38 
   39 required:
   40   - compatible
   41   - reg
   42 
   43 anyOf:
   44   - required:
   45       - interrupts
   46   - required:
   47       - msi-parent
   48 
   49 additionalProperties: false
   50 
   51 examples:
   52   - |
   53     #include <dt-bindings/interrupt-controller/arm-gic.h>
   54     #include <dt-bindings/interrupt-controller/irq.h>
   55 
   56     pmu@2b420000 {
   57             compatible = "arm,smmu-v3-pmcg";
   58             reg = <0x2b420000 0x1000>,
   59                   <0x2b430000 0x1000>;
   60             interrupts = <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>;
   61             msi-parent = <&its 0xff0000>;
   62     };
   63 
   64     pmu@2b440000 {
   65             compatible = "arm,smmu-v3-pmcg";
   66             reg = <0x2b440000 0x1000>,
   67                   <0x2b450000 0x1000>;
   68             interrupts = <GIC_SPI 81 IRQ_TYPE_EDGE_RISING>;
   69             msi-parent = <&its 0xff0000>;
   70     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/perf/arm,smmu-v3-pmcg.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/perf/arm,smmu-v3-pmcg.yaml