1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Allwinner A31 MIPI D-PHY Controller Device Tree Bindings
8
9 maintainers:
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
12
13 properties:
14 "#phy-cells":
15 const: 0
16
17 compatible:
18 oneOf:
19 - const: allwinner,sun6i-a31-mipi-dphy
20 - items:
21 - const: allwinner,sun50i-a64-mipi-dphy
22 - const: allwinner,sun6i-a31-mipi-dphy
23
24 reg:
25 maxItems: 1
26
27 clocks:
28 items:
29 - description: Bus Clock
30 - description: Module Clock
31
32 clock-names:
33 items:
34 - const: bus
35 - const: mod
36
37 resets:
38 maxItems: 1
39
40 allwinner,direction:
41 $ref: '/schemas/types.yaml#/definitions/string'
42 description: |
43 Direction of the D-PHY:
44 - "rx" for receiving (e.g. when used with MIPI CSI-2);
45 - "tx" for transmitting (e.g. when used with MIPI DSI).
46
47 enum:
48 - tx
49 - rx
50 default: tx
51
52 required:
53 - "#phy-cells"
54 - compatible
55 - reg
56 - clocks
57 - clock-names
58 - resets
59
60 additionalProperties: false
61
62 examples:
63 - |
64 dphy0: d-phy@1ca1000 {
65 compatible = "allwinner,sun6i-a31-mipi-dphy";
66 reg = <0x01ca1000 0x1000>;
67 clocks = <&ccu 23>, <&ccu 97>;
68 clock-names = "bus", "mod";
69 resets = <&ccu 4>;
70 #phy-cells = <0>;
71 };
72
73 ...
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