The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/phy/mediatek,ufs-phy.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 # Copyright (c) 2020 MediaTek
    3 %YAML 1.2
    4 ---
    5 $id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#
    6 $schema: http://devicetree.org/meta-schemas/core.yaml#
    7 
    8 title: MediaTek Universal Flash Storage (UFS) M-PHY binding
    9 
   10 maintainers:
   11   - Stanley Chu <stanley.chu@mediatek.com>
   12   - Chunfeng Yun <chunfeng.yun@mediatek.com>
   13 
   14 description: |
   15   UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
   16   Each UFS M-PHY node should have its own node.
   17   To bind UFS M-PHY with UFS host controller, the controller node should
   18   contain a phandle reference to UFS M-PHY node.
   19 
   20 properties:
   21   $nodename:
   22     pattern: "^ufs-phy@[0-9a-f]+$"
   23 
   24   compatible:
   25     oneOf:
   26       - items:
   27           - enum:
   28               - mediatek,mt8195-ufsphy
   29           - const: mediatek,mt8183-ufsphy
   30       - const: mediatek,mt8183-ufsphy
   31 
   32   reg:
   33     maxItems: 1
   34 
   35   clocks:
   36     items:
   37       - description: Unipro core control clock.
   38       - description: M-PHY core control clock.
   39 
   40   clock-names:
   41     items:
   42       - const: unipro
   43       - const: mp
   44 
   45   "#phy-cells":
   46     const: 0
   47 
   48 required:
   49   - compatible
   50   - reg
   51   - "#phy-cells"
   52   - clocks
   53   - clock-names
   54 
   55 additionalProperties: false
   56 
   57 examples:
   58   - |
   59     #include <dt-bindings/clock/mt8183-clk.h>
   60     ufsphy: ufs-phy@11fa0000 {
   61         compatible = "mediatek,mt8183-ufsphy";
   62         reg = <0x11fa0000 0xc000>;
   63         clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
   64                  <&infracfg CLK_INFRA_UFS_MP_SAP_BCLK>;
   65         clock-names = "unipro", "mp";
   66         #phy-cells = <0>;
   67     };
   68 
   69 ...

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