FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/phy/phy-cadence-sierra.txt

     Cadence Sierra PHY
     -----------------------
     
     Required properties:
     - compatible:   Must be "cdns,sierra-phy-t0" for Sierra in Cadence platform
                     Must be "ti,sierra-phy-t0" for Sierra in TI's J721E SoC.
     - resets:       Must contain an entry for each in reset-names.
                     See ../reset/reset.txt for details.
     - reset-names:  Must include "sierra_reset" and "sierra_apb".
                    "sierra_reset" must control the reset line to the PHY.
                    "sierra_apb" must control the reset line to the APB PHY
                    interface ("sierra_apb" is optional).
    - reg:          register range for the PHY.
    - #address-cells: Must be 1
    - #size-cells:  Must be 0
    
    Optional properties:
    - clocks:               Must contain an entry in clock-names.
                            See ../clocks/clock-bindings.txt for details.
    - clock-names:          Must contain "cmn_refclk_dig_div" and
                            "cmn_refclk1_dig_div" for configuring the frequency of
                            the clock to the lanes. "phy_clk" is deprecated.
    - cdns,autoconf:        A boolean property whose presence indicates that the
                            PHY registers will be configured by hardware. If not
                            present, all sub-node optional properties must be
                            provided.
    
    Sub-nodes:
      Each group of PHY lanes with a single master lane should be represented as
      a sub-node. Note that the actual configuration of each lane is determined by
      hardware strapping, and must match the configuration specified here.
    
    Sub-node required properties:
    - #phy-cells:   Generic PHY binding; must be 0.
    - reg:          The master lane number.  This is the lowest numbered lane
                    in the lane group.
    - resets:       Must contain one entry which controls the reset line for the
                    master lane of the sub-node.
                    See ../reset/reset.txt for details.
    
    Sub-node optional properties:
    - cdns,num-lanes:       Number of lanes in this group.  From 1 to 4.  The
                            group is made up of consecutive lanes.
    - cdns,phy-type:        Can be PHY_TYPE_PCIE or PHY_TYPE_USB3, depending on
                            configuration of lanes.
    
    Example:
            pcie_phy4: pcie-phy@fd240000 {
                    compatible = "cdns,sierra-phy-t0";
                    reg = <0x0 0xfd240000 0x0 0x40000>;
                    resets = <&phyrst 0>, <&phyrst 1>;
                    reset-names = "sierra_reset", "sierra_apb";
                    clocks = <&phyclock>;
                    clock-names = "phy_clk";
                    #address-cells = <1>;
                    #size-cells = <0>;
                    pcie0_phy0: pcie-phy@0 {
                                    reg = <0>;
                                    resets = <&phyrst 2>;
                                    cdns,num-lanes = <2>;
                                    #phy-cells = <0>;
                                    cdns,phy-type = <PHY_TYPE_PCIE>;
                    };
                    pcie0_phy1: pcie-phy@2 {
                                    reg = <2>;
                                    resets = <&phyrst 4>;
                                    cdns,num-lanes = <1>;
                                    #phy-cells = <0>;
                                    cdns,phy-type = <PHY_TYPE_PCIE>;
                    };

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