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     1 Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
    2 ===========================================
    3 
    4 This binding describes the USB PHY hardware provided by the RCU module on the
    5 Lantiq XWAY SoCs.
    6 
    7 This node has to be a sub node of the Lantiq RCU block.
    8 
    9 -------------------------------------------------------------------------------
   10 Required properties (controller (parent) node):
   11 - compatible    : Should be one of
   12                         "lantiq,ase-usb2-phy"
   13                         "lantiq,danube-usb2-phy"
   14                         "lantiq,xrx100-usb2-phy"
   15                         "lantiq,xrx200-usb2-phy"
   16                         "lantiq,xrx300-usb2-phy"
   17 - reg           : Defines the following sets of registers in the parent
   18                   syscon device
   19                         - Offset of the USB PHY configuration register
   20                         - Offset of the USB Analog configuration
   21                           register (only for xrx200 and xrx200)
   22 - clocks        : References to the (PMU) "phy" clk gate.
   23 - clock-names   : Must be "phy"
   24 - resets        : References to the RCU USB configuration reset bits.
   25 - reset-names   : Must be one of the following:
   26                         "phy" (optional)
   27                         "ctrl" (shared)
   28 
   29 -------------------------------------------------------------------------------
   30 Example for the USB PHYs on an xRX200 SoC:
   31         usb_phy0: usb2-phy@18 {
   32                 compatible = "lantiq,xrx200-usb2-phy";
   33                 reg = <0x18 4>, <0x38 4>;
   34 
   35                 clocks = <&pmu PMU_GATE_USB0_PHY>;
   36                 clock-names = "phy";
   37                 resets = <&reset1 4 4>, <&reset0 4 4>;
   38                 reset-names = "phy", "ctrl";
   39                 #phy-cells = <0>;
   40         };
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