1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: "http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7 title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY
8
9 maintainers:
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
11
12 description: |
13 Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY
14
15 properties:
16 compatible:
17 enum:
18 - qcom,usb-hs-28nm-femtophy
19 - qcom,usb-hs-28nm-mdm9607
20
21 reg:
22 maxItems: 1
23
24 "#phy-cells":
25 const: 0
26
27 clocks:
28 items:
29 - description: rpmcc ref clock
30 - description: PHY AHB clock
31 - description: Rentention clock
32
33 clock-names:
34 items:
35 - const: ref
36 - const: ahb
37 - const: sleep
38
39 resets:
40 items:
41 - description: PHY core reset
42 - description: POR reset
43
44 reset-names:
45 items:
46 - const: phy
47 - const: por
48
49 vdd-supply:
50 description: phandle to the regulator VDD supply node.
51
52 vdda1p8-supply:
53 description: phandle to the regulator 1.8V supply node.
54
55 vdda3p3-supply:
56 description: phandle to the regulator 3.3V supply node.
57
58 required:
59 - compatible
60 - reg
61 - "#phy-cells"
62 - clocks
63 - clock-names
64 - resets
65 - reset-names
66 - vdd-supply
67 - vdda1p8-supply
68 - vdda3p3-supply
69
70 additionalProperties: false
71
72 examples:
73 - |
74 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
75 #include <dt-bindings/clock/qcom,rpmcc.h>
76 usb2_phy_prim: phy@7a000 {
77 compatible = "qcom,usb-hs-28nm-femtophy";
78 reg = <0x0007a000 0x200>;
79 #phy-cells = <0>;
80 clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
81 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
82 <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
83 clock-names = "ref", "ahb", "sleep";
84 resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
85 <&gcc GCC_USB2A_PHY_BCR>;
86 reset-names = "phy", "por";
87 vdd-supply = <&vreg_l4_1p2>;
88 vdda1p8-supply = <&vreg_l5_1p8>;
89 vdda3p3-supply = <&vreg_l12_3p3>;
90 };
91 ...
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