1 * Renesas R-Car generation 2 USB PHY
2
3 This file provides information on what the device node for the R-Car generation
4 2 USB PHY contains.
5
6 Required properties:
7 - compatible: "renesas,usb-phy-r8a7742" if the device is a part of R8A7742 SoC.
8 "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
9 "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.
10 "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
11 "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC.
12 "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
13 "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
14 "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
15 "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or
16 RZ/G1 compatible device.
17
18 When compatible with the generic version, nodes must list the
19 SoC-specific version corresponding to the platform first
20 followed by the generic version.
21
22 - reg: offset and length of the register block.
23 - #address-cells: number of address cells for the USB channel subnodes, must
24 be <1>.
25 - #size-cells: number of size cells for the USB channel subnodes, must be <0>.
26 - clocks: clock phandle and specifier pair.
27 - clock-names: string, clock input name, must be "usbhs".
28
29 The USB PHY device tree node should have the subnodes corresponding to the USB
30 channels. These subnodes must contain the following properties:
31 - reg: the USB controller selector; see the table below for the values.
32 - #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
33
34 The phandle's argument in the PHY specifier is the USB controller selector for
35 the USB channel other than r8a77470 SoC; see the selector meanings below:
36
37 +-----------+---------------+---------------+
38 |\ Selector | | |
39 + --------- + 0 | 1 |
40 | Channel \| | |
41 +-----------+---------------+---------------+
42 | 0 | PCI EHCI/OHCI | HS-USB |
43 | 2 | PCI EHCI/OHCI | xHCI |
44 +-----------+---------------+---------------+
45
46 For r8a77470 SoC;see the selector meaning below:
47
48 +-----------+---------------+---------------+
49 |\ Selector | | |
50 + --------- + 0 | 1 |
51 | Channel \| | |
52 +-----------+---------------+---------------+
53 | 0 | EHCI/OHCI | HS-USB |
54 +-----------+---------------+---------------+
55
56 Example (Lager board):
57
58 usb-phy@e6590100 {
59 compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
60 reg = <0 0xe6590100 0 0x100>;
61 #address-cells = <1>;
62 #size-cells = <0>;
63 clocks = <&cpg CPG_MOD 704>;
64 clock-names = "usbhs";
65 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
66 resets = <&cpg 704>;
67
68 usb0: usb-channel@0 {
69 reg = <0>;
70 #phy-cells = <1>;
71 };
72 usb2: usb-channel@2 {
73 reg = <2>;
74 #phy-cells = <1>;
75 };
76 };
77
78 Example (iWave RZ/G1C sbc):
79
80 usbphy0: usb-phy0@e6590100 {
81 compatible = "renesas,usb-phy-r8a77470",
82 "renesas,rcar-gen2-usb-phy";
83 reg = <0 0xe6590100 0 0x100>;
84 #address-cells = <1>;
85 #size-cells = <0>;
86 clocks = <&cpg CPG_MOD 704>;
87 clock-names = "usbhs";
88 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
89 resets = <&cpg 704>;
90
91 usb0: usb-channel@0 {
92 reg = <0>;
93 #phy-cells = <1>;
94 };
95 };
96
97 usbphy1: usb-phy@e6598100 {
98 compatible = "renesas,usb-phy-r8a77470",
99 "renesas,rcar-gen2-usb-phy";
100 reg = <0 0xe6598100 0 0x100>;
101 #address-cells = <1>;
102 #size-cells = <0>;
103 clocks = <&cpg CPG_MOD 706>;
104 clock-names = "usbhs";
105 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
106 resets = <&cpg 706>;
107
108 usb1: usb-channel@0 {
109 reg = <0>;
110 #phy-cells = <1>;
111 };
112 };
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