1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/apple,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Apple GPIO controller
8
9 maintainers:
10 - Mark Kettenis <kettenis@openbsd.org>
11
12 description: |
13 The Apple GPIO controller is a simple combined pin and GPIO
14 controller present on Apple ARM SoC platforms, including various
15 iPhone and iPad devices and the "Apple Silicon" Macs.
16
17 properties:
18 compatible:
19 items:
20 - enum:
21 - apple,t8103-pinctrl
22 - apple,t6000-pinctrl
23 - const: apple,pinctrl
24
25 reg:
26 maxItems: 1
27
28 clocks:
29 maxItems: 1
30
31 gpio-controller: true
32
33 '#gpio-cells':
34 const: 2
35
36 gpio-ranges:
37 maxItems: 1
38
39 apple,npins:
40 $ref: /schemas/types.yaml#/definitions/uint32
41 description: The number of pins in this GPIO controller.
42
43 interrupts:
44 description: One interrupt for each of the (up to 7) interrupt
45 groups supported by the controller sorted by interrupt group
46 number in ascending order.
47 minItems: 1
48 maxItems: 7
49
50 interrupt-controller: true
51
52 '#interrupt-cells':
53 const: 2
54
55 power-domains:
56 maxItems: 1
57
58 patternProperties:
59 '-pins$':
60 type: object
61 $ref: pinmux-node.yaml#
62
63 properties:
64 pinmux:
65 description:
66 Values are constructed from pin number and alternate function
67 configuration number using the APPLE_PINMUX() helper macro
68 defined in include/dt-bindings/pinctrl/apple.h.
69
70 required:
71 - pinmux
72
73 additionalProperties: false
74
75 allOf:
76 - $ref: "pinctrl.yaml#"
77
78 required:
79 - compatible
80 - reg
81 - gpio-controller
82 - '#gpio-cells'
83 - gpio-ranges
84 - apple,npins
85
86 additionalProperties: false
87
88 examples:
89 - |
90 #include <dt-bindings/interrupt-controller/apple-aic.h>
91 #include <dt-bindings/pinctrl/apple.h>
92
93 soc {
94 #address-cells = <2>;
95 #size-cells = <2>;
96
97 pinctrl: pinctrl@23c100000 {
98 compatible = "apple,t8103-pinctrl", "apple,pinctrl";
99 reg = <0x2 0x3c100000 0x0 0x100000>;
100 clocks = <&gpio_clk>;
101
102 gpio-controller;
103 #gpio-cells = <2>;
104 gpio-ranges = <&pinctrl 0 0 212>;
105 apple,npins = <212>;
106
107 interrupt-controller;
108 #interrupt-cells = <2>;
109 interrupt-parent = <&aic>;
110 interrupts = <AIC_IRQ 16 IRQ_TYPE_LEVEL_HIGH>,
111 <AIC_IRQ 17 IRQ_TYPE_LEVEL_HIGH>,
112 <AIC_IRQ 18 IRQ_TYPE_LEVEL_HIGH>,
113 <AIC_IRQ 19 IRQ_TYPE_LEVEL_HIGH>,
114 <AIC_IRQ 20 IRQ_TYPE_LEVEL_HIGH>,
115 <AIC_IRQ 21 IRQ_TYPE_LEVEL_HIGH>,
116 <AIC_IRQ 22 IRQ_TYPE_LEVEL_HIGH>;
117
118 pcie_pins: pcie-pins {
119 pinmux = <APPLE_PINMUX(150, 1)>,
120 <APPLE_PINMUX(151, 1)>,
121 <APPLE_PINMUX(32, 1)>;
122 };
123 };
124 };
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