brcm,iproc-gpio.txt

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    1 Broadcom iProc GPIO/PINCONF Controller
    2 
    3 Required properties:
    4 
    5 - compatible:
    6     "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
    7     supports full-featured pinctrl and GPIO functions used in various iProc
    8     based SoCs
    9 
   10     May contain an SoC-specific compatibility string to accommodate any
   11     SoC-specific features
   12 
   13     "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
   14     "brcm,cygnus-crmu-gpio" for Cygnus SoCs
   15 
   16     "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
   17     disabled
   18 
   19     "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
   20     pinctrl support completely disabled in this IP block. In Stingray, a
   21     different IP block is used to handle pinctrl related functions
   22 
   23 - reg:
   24     Define the base and range of the I/O address space that contains SoC
   25 GPIO/PINCONF controller registers
   26 
   27 - ngpios:
   28     Total number of in-use slots in GPIO controller
   29 
   30 - #gpio-cells:
   31     Must be two. The first cell is the GPIO pin number (within the
   32 controller's pin space) and the second cell is used for the following:
   33     bit[0]: polarity (0 for active high and 1 for active low)
   34 
   35 - gpio-controller:
   36     Specifies that the node is a GPIO controller
   37 
   38 Optional properties:
   39 
   40 - interrupts:
   41     Interrupt ID
   42 
   43 - interrupt-controller:
   44     Specifies that the node is an interrupt controller
   45 
   46 - gpio-ranges:
   47     Specifies the mapping between gpio controller and pin-controllers pins.
   48     This requires 4 fields in cells defined as -
   49     1. Phandle of pin-controller.
   50     2. GPIO base pin offset.
   51     3  Pin-control base pin offset.
   52     4. number of gpio pins which are linearly mapped from pin base.
   53 
   54 Supported generic PINCONF properties in child nodes:
   55 
   56 - pins:
   57     The list of pins (within the controller's own pin space) that properties
   58 in the node apply to. Pin names are "gpio-<pin>"
   59 
   60 - bias-disable:
   61     Disable pin bias
   62 
   63 - bias-pull-up:
   64     Enable internal pull up resistor
   65 
   66 - bias-pull-down:
   67     Enable internal pull down resistor
   68 
   69 - drive-strength:
   70     Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA)
   71 
   72 Example:
   73         gpio_ccm: gpio@1800a000 {
   74                 compatible = "brcm,cygnus-ccm-gpio";
   75                 reg = <0x1800a000 0x50>,
   76                       <0x0301d164 0x20>;
   77                 ngpios = <24>;
   78                 #gpio-cells = <2>;
   79                 gpio-controller;
   80                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
   81                 interrupt-controller;
   82 
   83                 touch_pins: touch_pins {
   84                         pwr: pwr {
   85                                 pins = "gpio-0";
   86                                 drive-strength = <16>;
   87                         };
   88 
   89                         event: event {
   90                                 pins = "gpio-1";
   91                                 bias-pull-up;
   92                         };
   93                 };
   94         };
   95 
   96         gpio_asiu: gpio@180a5000 {
   97                 compatible = "brcm,cygnus-asiu-gpio";
   98                 reg = <0x180a5000 0x668>;
   99                 ngpios = <146>;
  100                 #gpio-cells = <2>;
  101                 gpio-controller;
  102                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
  103                 interrupt-controller;
  104                 gpio-ranges = <&pinctrl 0 42 1>,
  105                                 <&pinctrl 1 44 3>;
  106         };
  107 
  108         /*
  109          * Touchscreen that uses the CCM GPIO 0 and 1
  110          */
  111         tsc {
  112                 ...
  113                 ...
  114                 gpio-pwr = <&gpio_ccm 0 0>;
  115                 gpio-event = <&gpio_ccm 1 0>;
  116         };
  117 
  118         /* Bluetooth that uses the ASIU GPIO 5, with polarity inverted */
  119         bluetooth {
  120                 ...
  121                 ...
  122                 bcm,rfkill-bank-sel = <&gpio_asiu 5 1>
  123         }

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/brcm,iproc-gpio.txt

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/brcm,iproc-gpio.txt