fsl,imx7d-pinctrl.txt

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 * Freescale i.MX7 Dual IOMUX Controller
    2 
    3 iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar
    4 as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low
    5 power state retention capabilities on gpios that are part of iomuxc-lpsr
    6 (GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for
    7 mux and pad control settings, it shares the input select register from main
    8 iomuxc controller for daisy chain settings, the fsl,input-sel property extends
    9 fsl,imx-pinctrl driver to support iomuxc-lpsr controller.
   10 
   11 iomuxc_lpsr: iomuxc-lpsr@302c0000 {
   12         compatible = "fsl,imx7d-iomuxc-lpsr";
   13         reg = <0x302c0000 0x10000>;
   14         fsl,input-sel = <&iomuxc>;
   15 };
   16 
   17 iomuxc: iomuxc@30330000 {
   18         compatible = "fsl,imx7d-iomuxc";
   19         reg = <0x30330000 0x10000>;
   20 };
   21 
   22 Peripherals using pads from iomuxc-lpsr support low state retention power
   23 state, under LPSR mode GPIO's state of pads are retain.
   24 
   25 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
   26 and usage.
   27 
   28 Required properties:
   29 - compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or
   30   "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.
   31 - fsl,pins: each entry consists of 6 integers and represents the mux and config
   32   setting for one pin.  The first 5 integers <mux_reg conf_reg input_reg mux_val
   33   input_val> are specified using a PIN_FUNC_ID macro, which can be found in
   34   imx7d-pinfunc.h under device tree source folder.  The last integer CONFIG is
   35   the pad setting value like pull-up on this pin.  Please refer to i.MX7 Dual
   36   Reference Manual for detailed CONFIG settings.
   37 - fsl,input-sel: required property for iomuxc-lpsr controller, this property is
   38   a phandle for main iomuxc controller which shares the input select register for
   39   daisy chain settings.
   40 
   41 CONFIG bits definition:
   42 PAD_CTL_PUS_100K_DOWN           (0 << 5)
   43 PAD_CTL_PUS_5K_UP               (1 << 5)
   44 PAD_CTL_PUS_47K_UP              (2 << 5)
   45 PAD_CTL_PUS_100K_UP             (3 << 5)
   46 PAD_CTL_PUE                     (1 << 4)
   47 PAD_CTL_HYS                     (1 << 3)
   48 PAD_CTL_SRE_SLOW                (1 << 2)
   49 PAD_CTL_SRE_FAST                (0 << 2)
   50 PAD_CTL_DSE_X1                  (0 << 0)
   51 PAD_CTL_DSE_X4                  (1 << 0)
   52 PAD_CTL_DSE_X2                  (2 << 0)
   53 PAD_CTL_DSE_X6                  (3 << 0)
   54 
   55 Examples:
   56 While iomuxc-lpsr is intended to be used by dedicated peripherals to take
   57 advantages of LPSR power mode, is also possible that an IP to use pads from
   58 any of the iomux controllers. For example the I2C1 IP can use SCL pad from
   59 iomuxc-lpsr controller and SDA pad from iomuxc controller as:
   60 
   61 i2c1: i2c@30a20000 {
   62         pinctrl-names = "default";
   63         pinctrl-0 = <&pinctrl_i2c1_1>, <&pinctrl_i2c1_2>;
   64 };
   65 
   66 iomuxc-lpsr@302c0000 {
   67         compatible = "fsl,imx7d-iomuxc-lpsr";
   68         reg = <0x302c0000 0x10000>;
   69         fsl,input-sel = <&iomuxc>;
   70 
   71         pinctrl_i2c1_1: i2c1grp-1 {
   72                 fsl,pins = <
   73                         MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f
   74                 >;
   75         };
   76 };
   77 
   78 iomuxc@30330000 {
   79         compatible = "fsl,imx7d-iomuxc";
   80         reg = <0x30330000 0x10000>;
   81 
   82         pinctrl_i2c1_2: i2c1grp-2 {
   83                 fsl,pins = <
   84                         MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
   85                 >;
   86         };
   87 };

Cache object: bb16f6dbe9cce70c3187ad7dbca9c337

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/fsl,imx7d-pinctrl.txt

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/fsl,imx7d-pinctrl.txt