Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/img,pistachio-pinctrl.txt
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
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1 Imagination Technologies Pistachio SoC pin controllers 2 ====================================================== 3 4 The pin controllers on Pistachio are a combined GPIO controller, (GPIO) 5 interrupt controller, and pinmux + pinconf device. The system ("east") pin 6 controller on Pistachio has 99 pins, 90 of which are MFIOs which can be 7 configured as GPIOs. The 90 GPIOs are divided into 6 banks of up to 16 GPIOs 8 each. The GPIO banks are represented as sub-nodes of the pad controller node. 9 10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 11 ../interrupt-controller/interrupts.txt for generic information regarding 12 pin controller, GPIO, and interrupt bindings. 13 14 Required properties for pin controller node: 15 -------------------------------------------- 16 - compatible: "img,pistachio-system-pinctrl". 17 - reg: Address range of the pinctrl registers. 18 19 Required properties for GPIO bank sub-nodes: 20 -------------------------------------------- 21 - interrupts: Interrupt line for the GPIO bank. 22 - gpio-controller: Indicates the device is a GPIO controller. 23 - #gpio-cells: Must be two. The first cell is the GPIO pin number and the 24 second cell indicates the polarity. See <dt-bindings/gpio/gpio.h> for 25 a list of possible values. 26 - interrupt-controller: Indicates the device is an interrupt controller. 27 - #interrupt-cells: Must be two. The first cell is the GPIO pin number and 28 the second cell encodes the interrupt flags. See 29 <dt-bindings/interrupt-controller/irq.h> for a list of valid flags. 30 31 Note that the N GPIO bank sub-nodes *must* be named gpio0, gpio1, ... gpioN-1. 32 33 Required properties for pin configuration sub-nodes: 34 ---------------------------------------------------- 35 - pins: List of pins to which the configuration applies. See below for a 36 list of possible pins. 37 38 Optional properties for pin configuration sub-nodes: 39 ---------------------------------------------------- 40 - function: Mux function for the specified pins. This is not applicable for 41 non-MFIO pins. See below for a list of valid functions for each pin. 42 - bias-high-impedance: Enable high-impedance mode. 43 - bias-pull-up: Enable weak pull-up. 44 - bias-pull-down: Enable weak pull-down. 45 - bias-bus-hold: Enable bus-keeper mode. 46 - drive-strength: Drive strength in mA. Supported values: 2, 4, 8, 12. 47 - input-schmitt-enable: Enable Schmitt trigger. 48 - input-schmitt-disable: Disable Schmitt trigger. 49 - slew-rate: Slew rate control. 0 for slow, 1 for fast. 50 51 Pin Functions 52 --- --------- 53 mfio0 spim1 54 mfio1 spim1, spim0, uart1 55 mfio2 spim1, spim0, uart1 56 mfio3 spim1 57 mfio4 spim1 58 mfio5 spim1 59 mfio6 spim1 60 mfio7 spim1 61 mfio8 spim0 62 mfio9 spim0 63 mfio10 spim0 64 mfio11 spis 65 mfio12 spis 66 mfio13 spis 67 mfio14 spis 68 mfio15 sdhost, mips_trace_clk, mips_trace_data 69 mfio16 sdhost, mips_trace_dint, mips_trace_data 70 mfio17 sdhost, mips_trace_trigout, mips_trace_data 71 mfio18 sdhost, mips_trace_trigin, mips_trace_data 72 mfio19 sdhost, mips_trace_dm, mips_trace_data 73 mfio20 sdhost, mips_trace_probe_n, mips_trace_data 74 mfio21 sdhost, mips_trace_data 75 mfio22 sdhost, mips_trace_data 76 mfio23 sdhost 77 mfio24 sdhost 78 mfio25 sdhost 79 mfio26 sdhost 80 mfio27 sdhost 81 mfio28 i2c0, spim0 82 mfio29 i2c0, spim0 83 mfio30 i2c1, spim0 84 mfio31 i2c1, spim1 85 mfio32 i2c2 86 mfio33 i2c2 87 mfio34 i2c3 88 mfio35 i2c3 89 mfio36 i2s_out, audio_clk_in 90 mfio37 i2s_out, debug_raw_cca_ind 91 mfio38 i2s_out, debug_ed_sec20_cca_ind 92 mfio39 i2s_out, debug_ed_sec40_cca_ind 93 mfio40 i2s_out, debug_agc_done_0 94 mfio41 i2s_out, debug_agc_done_1 95 mfio42 i2s_out, debug_ed_cca_ind 96 mfio43 i2s_out, debug_s2l_done 97 mfio44 i2s_out 98 mfio45 i2s_dac_clk, audio_sync 99 mfio46 audio_trigger 100 mfio47 i2s_in 101 mfio48 i2s_in 102 mfio49 i2s_in 103 mfio50 i2s_in 104 mfio51 i2s_in 105 mfio52 i2s_in 106 mfio53 i2s_in 107 mfio54 i2s_in, spdif_in 108 mfio55 uart0, spim0, spim1 109 mfio56 uart0, spim0, spim1 110 mfio57 uart0, spim0, spim1 111 mfio58 uart0, spim1 112 mfio59 uart1 113 mfio60 uart1 114 mfio61 spdif_out 115 mfio62 spdif_in 116 mfio63 eth, mips_trace_clk, mips_trace_data 117 mfio64 eth, mips_trace_dint, mips_trace_data 118 mfio65 eth, mips_trace_trigout, mips_trace_data 119 mfio66 eth, mips_trace_trigin, mips_trace_data 120 mfio67 eth, mips_trace_dm, mips_trace_data 121 mfio68 eth, mips_trace_probe_n, mips_trace_data 122 mfio69 eth, mips_trace_data 123 mfio70 eth, mips_trace_data 124 mfio71 eth 125 mfio72 ir 126 mfio73 pwmpdm, mips_trace_clk, sram_debug 127 mfio74 pwmpdm, mips_trace_dint, sram_debug 128 mfio75 pwmpdm, mips_trace_trigout, rom_debug 129 mfio76 pwmpdm, mips_trace_trigin, rom_debug 130 mfio77 mdc_debug, mips_trace_dm, rpu_debug 131 mfio78 mdc_debug, mips_trace_probe_n, rpu_debug 132 mfio79 ddr_debug, mips_trace_data, mips_debug 133 mfio80 ddr_debug, mips_trace_data, mips_debug 134 mfio81 dreq0, mips_trace_data, eth_debug 135 mfio82 dreq1, mips_trace_data, eth_debug 136 mfio83 mips_pll_lock, mips_trace_data, usb_debug 137 mfio84 audio_pll_lock, mips_trace_data, usb_debug 138 mfio85 rpu_v_pll_lock, mips_trace_data, sdhost_debug 139 mfio86 rpu_l_pll_lock, mips_trace_data, sdhost_debug 140 mfio87 sys_pll_lock, dreq2, socif_debug 141 mfio88 wifi_pll_lock, dreq3, socif_debug 142 mfio89 bt_pll_lock, dreq4, dreq5 143 tck 144 trstn 145 tdi 146 tms 147 tdo 148 jtag_comply 149 safe_mode 150 por_disable 151 resetn 152 153 Example: 154 -------- 155 pinctrl@18101c00 { 156 compatible = "img,pistachio-system-pinctrl"; 157 reg = <0x18101C00 0x400>; 158 159 gpio0: gpio0 { 160 interrupts = <GIC_SHARED 71 IRQ_TYPE_LEVEL_HIGH>; 161 162 gpio-controller; 163 #gpio-cells = <2>; 164 165 interrupt-controller; 166 #interrupt-cells = <2>; 167 }; 168 169 ... 170 171 gpio5: gpio5 { 172 interrupts = <GIC_SHARED 76 IRQ_TYPE_LEVEL_HIGH>; 173 174 gpio-controller; 175 #gpio-cells = <2>; 176 177 interrupt-controller; 178 #interrupt-cells = <2>; 179 }; 180 181 ... 182 183 uart0_xfer: uart0-xfer { 184 uart0-rxd { 185 pins = "mfio55"; 186 function = "uart0"; 187 }; 188 uart0-txd { 189 pins = "mfio56"; 190 function = "uart0"; 191 }; 192 }; 193 194 uart0_rts_cts: uart0-rts-cts { 195 uart0-rts { 196 pins = "mfio57"; 197 function = "uart0"; 198 }; 199 uart0-cts { 200 pins = "mfio58"; 201 function = "uart0"; 202 }; 203 }; 204 }; 205 206 uart@... { 207 ... 208 pinctrl-names = "default"; 209 pinctrl-0 = <&uart0_xfer>, <&uart0_rts_cts>; 210 ... 211 }; 212 213 usb_vbus: fixed-regulator { 214 ... 215 gpio = <&gpio5 6 GPIO_ACTIVE_HIGH>; 216 ... 217 };
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