ingenic,pinctrl.txt

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    1 Ingenic XBurst pin controller
    2 
    3 Please refer to pinctrl-bindings.txt in this directory for details of the
    4 common pinctrl bindings used by client devices, including the meaning of the
    5 phrase "pin configuration node".
    6 
    7 For the XBurst SoCs, pin control is tightly bound with GPIO ports. All pins may
    8 be used as GPIOs, multiplexed device functions are configured within the
    9 GPIO port configuration registers and it is typical to refer to pins using the
   10 naming scheme "PxN" where x is a character identifying the GPIO port with
   11 which the pin is associated and N is an integer from 0 to 31 identifying the
   12 pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
   13 PB31 is the last pin in GPIO port B. The jz4740, the x1000 and the x1830
   14 contains 4 GPIO ports, PA to PD, for a total of 128 pins. The jz4760, the
   15 jz4770 and the jz4780 contains 6 GPIO ports, PA to PF, for a total of 192 pins.
   16 
   17 
   18 Required properties:
   19 --------------------
   20 
   21  - compatible: One of:
   22     - "ingenic,jz4740-pinctrl"
   23     - "ingenic,jz4725b-pinctrl"
   24     - "ingenic,jz4760-pinctrl"
   25     - "ingenic,jz4760b-pinctrl"
   26     - "ingenic,jz4770-pinctrl"
   27     - "ingenic,jz4780-pinctrl"
   28     - "ingenic,x1000-pinctrl"
   29     - "ingenic,x1000e-pinctrl"
   30     - "ingenic,x1500-pinctrl"
   31     - "ingenic,x1830-pinctrl"
   32  - reg: Address range of the pinctrl registers.
   33 
   34 
   35 Required properties for sub-nodes (GPIO chips):
   36 -----------------------------------------------
   37 
   38  - compatible: Must contain one of:
   39     - "ingenic,jz4740-gpio"
   40     - "ingenic,jz4760-gpio"
   41     - "ingenic,jz4770-gpio"
   42     - "ingenic,jz4780-gpio"
   43     - "ingenic,x1000-gpio"
   44     - "ingenic,x1830-gpio"
   45  - reg: The GPIO bank number.
   46  - interrupt-controller: Marks the device node as an interrupt controller.
   47  - interrupts: Interrupt specifier for the controllers interrupt.
   48  - #interrupt-cells: Should be 2. Refer to
   49    ../interrupt-controller/interrupts.txt for more details.
   50  - gpio-controller: Marks the device node as a GPIO controller.
   51  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
   52     cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
   53     GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
   54  - gpio-ranges: Range of pins managed by the GPIO controller. Refer to
   55    ../gpio/gpio.txt for more details.
   56 
   57 
   58 Example:
   59 --------
   60 
   61 pinctrl: pin-controller@10010000 {
   62         compatible = "ingenic,jz4740-pinctrl";
   63         reg = <0x10010000 0x400>;
   64         #address-cells = <1>;
   65         #size-cells = <0>;
   66 
   67         gpa: gpio@0 {
   68                 compatible = "ingenic,jz4740-gpio";
   69                 reg = <0>;
   70 
   71                 gpio-controller;
   72                 gpio-ranges = <&pinctrl 0 0 32>;
   73                 #gpio-cells = <2>;
   74 
   75                 interrupt-controller;
   76                 #interrupt-cells = <2>;
   77 
   78                 interrupt-parent = <&intc>;
   79                 interrupts = <28>;
   80         };
   81 };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/ingenic,pinctrl.txt

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/ingenic,pinctrl.txt