1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Mediatek MT7986 Pin Controller Device Tree Bindings
8
9 maintainers:
10 - Sean Wang <sean.wang@kernel.org>
11
12 description: |+
13 The MediaTek's MT7986 Pin controller is used to control SoC pins.
14
15 properties:
16 compatible:
17 enum:
18 - mediatek,mt7986a-pinctrl
19 - mediatek,mt7986b-pinctrl
20
21 reg:
22 minItems: 8
23 maxItems: 8
24
25 reg-names:
26 items:
27 - const: gpio
28 - const: iocfg_rt
29 - const: iocfg_rb
30 - const: iocfg_lt
31 - const: iocfg_lb
32 - const: iocfg_tr
33 - const: iocfg_tl
34 - const: eint
35
36 gpio-controller: true
37
38 "#gpio-cells":
39 const: 2
40 description: |
41 Number of cells in GPIO specifier. Since the generic GPIO
42 binding is used, the amount of cells must be specified as 2. See the below
43 mentioned gpio binding representation for description of particular cells.
44
45 gpio-ranges:
46 minItems: 1
47 maxItems: 5
48 description: |
49 GPIO valid number range.
50
51 interrupt-controller: true
52
53 interrupts:
54 maxItems: 1
55
56 "#interrupt-cells":
57 const: 2
58
59 allOf:
60 - $ref: "pinctrl.yaml#"
61
62 required:
63 - compatible
64 - reg
65 - reg-names
66 - gpio-controller
67 - "#gpio-cells"
68
69 patternProperties:
70 '-pins$':
71 type: object
72 additionalProperties: false
73
74 patternProperties:
75 '.*mux.*':
76 type: object
77 additionalProperties: false
78 description: |
79 pinmux configuration nodes.
80
81 The following table shows the effective values of "group", "function"
82 properties and chip pinout pins
83
84 groups function pins (in pin#)
85 ---------------------------------------------------------------------
86 "watchdog" "watchdog" 0
87 "wifi_led" "led" 1, 2
88 "i2c" "i2c" 3, 4
89 "uart1_0" "uart" 7, 8, 9, 10
90 "pcie_clk" "pcie" 9
91 "pcie_wake" "pcie" 10
92 "spi1_0" "spi" 11, 12, 13, 14
93 "pwm1_1" "pwm" 20,
94 "pwm0" "pwm" 21,
95 "pwm1_0" "pwm" 22,
96 "snfi" "flash" 23, 24, 25, 26, 27, 28
97 "spi1_2" "spi" 29, 30, 31, 32
98 "emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30,
99 31, 32
100 "spi1_1" "spi" 23, 24, 25, 26
101 "uart1_2" "uart" 29, 30, 31, 32
102 "uart1_1" "uart" 23, 24, 25, 26
103 "uart2_0" "uart" 29, 30, 31, 32
104 "spi0" "spi" 33, 34, 35, 36
105 "spi0_wp_hold" "spi" 37, 38
106 "uart1_3_rx_tx" "uart" 35, 36
107 "uart1_3_cts_rts" "uart" 37, 38
108 "uart2_1" "uart" 33, 34, 35, 36
109 "spi1_3" "spi" 33, 34, 35, 36
110 "uart0" "uart" 39, 40
111 "pcie_pereset" "pcie" 41
112 "uart1" "uart" 42, 43, 44, 45
113 "uart2" "uart" 46, 47, 48, 49
114 "emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 57,
115 59, 60, 61
116 "pcm" "audio" 62, 63, 64, 65
117 "i2s" "audio" 62, 63, 64, 65
118 "switch_int" "eth" 66
119 "mdc_mdio" "eth" 67
120
121 $ref: "/schemas/pinctrl/pinmux-node.yaml"
122 properties:
123 function:
124 description: |
125 A string containing the name of the function to mux to the group.
126 There is no "audio", "pcie" functions on mt7986b, you can only use
127 those functions on mt7986a.
128 enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart,
129 watchdog, wifi]
130 groups:
131 description: |
132 An array of strings. Each string contains the name of a group.
133 There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm",
134 and "i2s" groups on mt7986b, you can only use those groups on
135 mt7986a.
136 required:
137 - function
138 - groups
139
140 allOf:
141 - if:
142 properties:
143 function:
144 const: audio
145 then:
146 properties:
147 groups:
148 enum: [pcm, i2s]
149 - if:
150 properties:
151 function:
152 const: emmc
153 then:
154 properties:
155 groups:
156 enum: [emmc, emmc_rst]
157 - if:
158 properties:
159 function:
160 const: eth
161 then:
162 properties:
163 groups:
164 enum: [switch_int, mdc_mdio]
165 - if:
166 properties:
167 function:
168 const: i2c
169 then:
170 properties:
171 groups:
172 enum: [i2c]
173 - if:
174 properties:
175 function:
176 const: led
177 then:
178 properties:
179 groups:
180 enum: [wifi_led]
181 - if:
182 properties:
183 function:
184 const: flash
185 then:
186 properties:
187 groups:
188 enum: [snfi]
189 - if:
190 properties:
191 function:
192 const: pcie
193 then:
194 properties:
195 groups:
196 enum: [pcie_clk, pcie_wake, pcie_pereset]
197 - if:
198 properties:
199 function:
200 const: pwm
201 then:
202 properties:
203 groups:
204 enum: [pwm0, pwm1_0, pwm1_1]
205 - if:
206 properties:
207 function:
208 const: spi
209 then:
210 properties:
211 groups:
212 enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3]
213 - if:
214 properties:
215 function:
216 const: uart
217 then:
218 properties:
219 groups:
220 enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx,
221 uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2]
222 - if:
223 properties:
224 function:
225 const: watchdog
226 then:
227 properties:
228 groups:
229 enum: [watchdog]
230 - if:
231 properties:
232 function:
233 const: wifi
234 then:
235 properties:
236 groups:
237 enum: [wf_2g, wf_5g, wf_dbdc]
238 '.*conf.*':
239 type: object
240 additionalProperties: false
241 description: |
242 pinconf configuration nodes.
243 $ref: "/schemas/pinctrl/pincfg-node.yaml"
244
245 properties:
246 pins:
247 description: |
248 An array of strings. Each string contains the name of a pin.
249 There is no PIN 41 to PIN 65 above on mt7686b, you can only use
250 those pins on mt7986a.
251 enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
252 GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
253 GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,
254 GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,
255 SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,
256 SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,
257 UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,
258 UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,
259 UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,
260 EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,
261 EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,
262 PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
263 WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
264 WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
265 WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
266 WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,
267 WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,
268 WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,
269 WF1_HB8]
270
271 bias-disable: true
272
273 bias-pull-up: true
274
275 bias-pull-down: true
276
277 input-enable: true
278
279 input-disable: true
280
281 output-enable: true
282
283 output-low: true
284
285 output-high: true
286
287 input-schmitt-enable: true
288
289 input-schmitt-disable: true
290
291 drive-strength:
292 enum: [2, 4, 6, 8, 10, 12, 14, 16]
293
294 mediatek,pull-up-adv:
295 description: |
296 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
297 Pull up setings for 2 pull resistors, R0 and R1. Valid arguments
298 are described as below:
299 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
300 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
301 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
302 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
303 $ref: /schemas/types.yaml#/definitions/uint32
304 enum: [0, 1, 2, 3]
305
306 mediatek,pull-down-adv:
307 description: |
308 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
309 Pull down setings for 2 pull resistors, R0 and R1. Valid arguments
310 are described as below:
311 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
312 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
313 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
314 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
315 $ref: /schemas/types.yaml#/definitions/uint32
316 enum: [0, 1, 2, 3]
317
318 required:
319 - pins
320
321 additionalProperties: false
322
323 examples:
324 - |
325 #include <dt-bindings/interrupt-controller/irq.h>
326 #include <dt-bindings/interrupt-controller/arm-gic.h>
327
328 soc {
329 #address-cells = <2>;
330 #size-cells = <2>;
331 pio: pinctrl@1001f000 {
332 compatible = "mediatek,mt7986a-pinctrl";
333 reg = <0 0x1001f000 0 0x1000>,
334 <0 0x11c30000 0 0x1000>,
335 <0 0x11c40000 0 0x1000>,
336 <0 0x11e20000 0 0x1000>,
337 <0 0x11e30000 0 0x1000>,
338 <0 0x11f00000 0 0x1000>,
339 <0 0x11f10000 0 0x1000>,
340 <0 0x1000b000 0 0x1000>;
341 reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
342 "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
343 gpio-controller;
344 #gpio-cells = <2>;
345 gpio-ranges = <&pio 0 0 100>;
346 interrupt-controller;
347 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
348 interrupt-parent = <&gic>;
349 #interrupt-cells = <2>;
350
351 uart1_pins: uart1-pins {
352 mux {
353 function = "uart";
354 groups = "uart1";
355 };
356 };
357
358 uart2_pins: uart2-pins {
359 mux {
360 function = "uart";
361 groups = "uart2";
362 };
363 };
364
365 };
366 };
Cache object: 13a9b828e0add67b079c35f8f04c2ea6
|