pinctrl-mt6797.txt

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 * MediaTek MT6797 Pin Controller
    2 
    3 The MediaTek's MT6797 Pin controller is used to control SoC pins.
    4 
    5 Required properties:
    6 - compatible: Value should be one of the following.
    7               "mediatek,mt6797-pinctrl", compatible with mt6797 pinctrl.
    8 - reg:        Should contain address and size for gpio, iocfgl, iocfgb,
    9               iocfgr and iocfgt register bases.
   10 - reg-names:  An array of strings describing the "reg" entries. Must
   11               contain "gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt".
   12 - gpio-controller: Marks the device node as a gpio controller.
   13 - #gpio-cells: Should be two. The first cell is the gpio pin number
   14                and the second cell is used for optional parameters.
   15 
   16 Optional properties:
   17 - interrupt-controller: Marks the device node as an interrupt controller.
   18 - #interrupt-cells: Should be two.
   19 - interrupts : The interrupt outputs from the controller.
   20 
   21 Please refer to pinctrl-bindings.txt in this directory for details of the
   22 common pinctrl bindings used by client devices.
   23 
   24 Subnode format
   25 A pinctrl node should contain at least one subnodes representing the
   26 pinctrl groups available on the machine. Each subnode will list the
   27 pins it needs, and how they should be configured, with regard to muxer
   28 configuration, pullups, drive strength, input enable/disable and input schmitt.
   29 
   30     node {
   31         pinmux = <PIN_NUMBER_PINMUX>;
   32         GENERIC_PINCONFIG;
   33     };
   34 
   35 Required properties:
   36 - pinmux: Integer array, represents gpio pin number and mux setting.
   37     Supported pin number and mux varies for different SoCs, and are defined
   38     as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
   39 
   40 Optional properties:
   41 - GENERIC_PINCONFIG: is the generic pinconfig options to use, bias-disable,
   42     bias-pull, bias-pull-down, input-enable, input-schmitt-enable,
   43     input-schmitt-disable, output-enable output-low, output-high,
   44     drive-strength, and slew-rate are valid.
   45 
   46     Valid arguments for 'slew-rate' are '0' for no slew rate controlled and
   47     '1' for slower slew rate respectively. Valid arguments for 'drive-strength'
   48     is limited, such as 2, 4, 8, 12, or 16 in mA.
   49 
   50     Some optional vendor properties as defined are valid to specify in a
   51     pinconf subnode:
   52     - mediatek,tdsel: An integer describing the steps for output level shifter
   53       duty cycle when asserted (high pulse width adjustment). Valid arguments
   54       are from 0 to 15.
   55     - mediatek,rdsel: An integer describing the steps for input level shifter
   56       duty cycle when asserted (high pulse width adjustment). Valid arguments
   57       are from 0 to 63.
   58     - mediatek,pull-up-adv: An integer describing the code R1R0 as 0, 1, 2
   59       or 3 for the advanced pull-up resistors.
   60     - mediatek,pull-down-adv: An integer describing the code R1R0 as 0, 1, 2,
   61       or 3 for the advanced pull-down resistors.
   62 
   63 Examples:
   64 
   65         pio: pinctrl@10005000 {
   66                 compatible = "mediatek,mt6797-pinctrl";
   67                 reg = <0 0x10005000 0 0x1000>,
   68                       <0 0x10002000 0 0x400>,
   69                       <0 0x10002400 0 0x400>,
   70                       <0 0x10002800 0 0x400>,
   71                       <0 0x10002C00 0 0x400>;
   72                 reg-names = "gpio", "iocfgl", "iocfgb",
   73                             "iocfgr", "iocfgt";
   74                 gpio-controller;
   75                 #gpio-cells = <2>;
   76 
   77                 uart1_pins_a: uart1 {
   78                         pins1 {
   79                                 pinmux = <MT6797_GPIO232__FUNC_URXD1>,
   80                                          <MT6797_GPIO233__FUNC_UTXD1>;
   81                         };
   82                 };
   83         };

Cache object: 7198deb5af8bcd54229a1dd338ea1d44

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/pinctrl-mt6797.txt

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/pinctrl-mt6797.txt