The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/pinctrl-zx.txt

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    1 * ZTE ZX Pin Controller
    2 
    3 The pin controller on ZTE ZX platforms is kinda of hybrid.  It consists of
    4 a main controller and an auxiliary one.  For example, on ZX296718 SoC, the
    5 main controller is TOP_PMM and the auxiliary one is AON_IOCFG.  Both
    6 controllers work together to control pin multiplexing and configuration in
    7 the way illustrated as below.
    8 
    9 
   10            GMII_RXD3 ---+
   11                         |
   12              DVI1_HS ---+----------------------------- GMII_RXD3 (TOP pin)
   13                         |
   14              BGPIO16 ---+                               ^
   15                                                         | pinconf
   16                         ^                               |
   17                         | pinmux                        |
   18                         |                               |
   19 
   20                    TOP_PMM (main)           AON_IOCFG (aux)
   21 
   22                         |                       |       |
   23                         |                pinmux |       |
   24                         | pinmux                v       |
   25                         v                               | pinconf
   26                                     KEY_ROW2 ---+       v
   27         PORT1_LCD_TE ---+                       |
   28                         |            AGPIO10 ---+------ KEY_ROW2 (AON pin)
   29           I2S0_DOUT3 ---+                       |
   30                         |-----------------------+
   31             PWM_OUT3 ---+
   32                         |
   33              VGA_VS1 ---+
   34 
   35 
   36 For most of pins like GMII_RXD3 in the figure, the pinmux function is
   37 controlled by TOP_PMM block only, and this type of pins are meant by term
   38 'TOP pins'.  For pins like KEY_ROW2, the pinmux is controlled by both
   39 TOP_PMM and AON_IOCFG blocks, as the available multiplexing functions for
   40 the pin spread in both controllers.  This type of pins are called 'AON pins'.
   41 Though pinmux implementation is quite different, pinconf is same for both
   42 types of pins.  Both are controlled by auxiliary controller, i.e. AON_IOCFG
   43 on ZX296718.
   44 
   45 Required properties:
   46 - compatible: should be "zte,zx296718-pmm".
   47 - reg: the register physical address and length.
   48 - zte,auxiliary-controller: phandle to the auxiliary pin controller which
   49   implements pinmux for AON pins and pinconf for all pins.
   50 
   51 The following pin configuration are supported. Please refer to
   52 pinctrl-bindings.txt in this directory for more details of the common
   53 pinctrl bindings used by client devices.
   54 
   55 - bias-pull-up
   56 - bias-pull-down
   57 - drive-strength
   58 - input-enable
   59 - slew-rate
   60 
   61 Examples:
   62 
   63 iocfg: pin-controller@119000 {
   64         compatible = "zte,zx296718-iocfg";
   65         reg = <0x119000 0x1000>;
   66 };
   67 
   68 pmm: pin-controller@1462000 {
   69         compatible = "zte,zx296718-pmm";
   70         reg = <0x1462000 0x1000>;
   71         zte,auxiliary-controller = <&iocfg>;
   72 };
   73 
   74 &pmm {
   75         vga_pins: vga {
   76                 pins = "KEY_COL1", "KEY_COL2", "KEY_ROW1", "KEY_ROW2";
   77                 function = "VGA";
   78         };
   79 };
   80 
   81 &vga {
   82         pinctrl-names = "default";
   83         pinctrl-0 = <&vga_pins>;
   84 };

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