The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/renesas,pfc-pinctrl.txt

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    1 * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
    2 
    3 The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
    4 R8A73A4 and R8A7740 it also acts as a GPIO controller.
    5 
    6 
    7 Pin Control
    8 -----------
    9 
   10 Required Properties:
   11 
   12   - compatible: should be one of the following.
   13     - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
   14     - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
   15     - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
   16     - "renesas,pfc-r8a7742": for R8A7742 (RZ/G1H) compatible pin-controller.
   17     - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
   18     - "renesas,pfc-r8a7744": for R8A7744 (RZ/G1N) compatible pin-controller.
   19     - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
   20     - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.
   21     - "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller.
   22     - "renesas,pfc-r8a774b1": for R8A774B1 (RZ/G2N) compatible pin-controller.
   23     - "renesas,pfc-r8a774c0": for R8A774C0 (RZ/G2E) compatible pin-controller.
   24     - "renesas,pfc-r8a774e1": for R8A774E1 (RZ/G2H) compatible pin-controller.
   25     - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.
   26     - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
   27     - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
   28     - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
   29     - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller.
   30     - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
   31     - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
   32     - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
   33     - "renesas,pfc-r8a7796": for R8A77960 (R-Car M3-W) compatible pin-controller.
   34     - "renesas,pfc-r8a77961": for R8A77961 (R-Car M3-W+) compatible pin-controller.
   35     - "renesas,pfc-r8a77965": for R8A77965 (R-Car M3-N) compatible pin-controller.
   36     - "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller.
   37     - "renesas,pfc-r8a77980": for R8A77980 (R-Car V3H) compatible pin-controller.
   38     - "renesas,pfc-r8a77990": for R8A77990 (R-Car E3) compatible pin-controller.
   39     - "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller.
   40     - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
   41 
   42   - reg: Base address and length of each memory resource used by the pin
   43     controller hardware module.
   44 
   45 Optional properties:
   46 
   47   - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
   48     otherwise. Should be 3.
   49 
   50   - interrupts-extended: Specify the interrupts associated with external
   51     IRQ pins. This property is mandatory when the PFC handles GPIOs and
   52     forbidden otherwise. When specified, it must contain one interrupt per
   53     external IRQ, sorted by external IRQ number.
   54 
   55 The PFC node also acts as a container for pin configuration nodes. Please refer
   56 to pinctrl-bindings.txt in this directory for the definition of the term "pin
   57 configuration node" and for the common pinctrl bindings used by client devices.
   58 
   59 Each pin configuration node represents a desired configuration for a pin, a
   60 pin group, or a list of pins or pin groups. The configuration can include the
   61 function to select on those pin(s) and pin configuration parameters (such as
   62 pull-up and pull-down).
   63 
   64 Pin configuration nodes contain pin configuration properties, either directly
   65 or grouped in child subnodes. Both pin muxing and configuration parameters can
   66 be grouped in that way and referenced as a single pin configuration node by
   67 client devices.
   68 
   69 A configuration node or subnode must reference at least one pin (through the
   70 pins or pin groups properties) and contain at least a function or one
   71 configuration parameter. When the function is present only pin groups can be
   72 used to reference pins.
   73 
   74 All pin configuration nodes and subnodes names are ignored. All of those nodes
   75 are parsed through phandles and processed purely based on their content.
   76 
   77 Pin Configuration Node Properties:
   78 
   79 - pins : An array of strings, each string containing the name of a pin.
   80 - groups : An array of strings, each string containing the name of a pin
   81   group.
   82 
   83 - function: A string containing the name of the function to mux to the pin
   84   group(s) specified by the groups property.
   85 
   86   Valid values for pin, group and function names can be found in the group and
   87   function arrays of the PFC data file corresponding to the SoC
   88   (drivers/pinctrl/sh-pfc/pfc-*.c)
   89 
   90 The pin configuration parameters use the generic pinconf bindings defined in
   91 pinctrl-bindings.txt in this directory. The supported parameters are
   92 bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
   93 pins that have a configurable I/O voltage, the power-source value should be the
   94 nominal I/O voltage in millivolts.
   95 
   96 
   97 GPIO
   98 ----
   99 
  100 On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
  101 
  102 Required Properties:
  103 
  104   - gpio-controller: Marks the device node as a gpio controller.
  105 
  106   - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
  107     cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
  108     GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
  109 
  110 The syntax of the gpio specifier used by client nodes should be the following
  111 with values derived from the SoC user manual.
  112 
  113   <[phandle of the gpio controller node]
  114    [pin number within the gpio controller]
  115    [flags]>
  116 
  117 On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
  118 Please refer to Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml
  119 for documentation of the GPIO device tree bindings on those platforms.
  120 
  121 
  122 Examples
  123 --------
  124 
  125 Example 1: SH73A0 (SH-Mobile AG5) pin controller node
  126 
  127         pfc: pin-controller@e6050000 {
  128                 compatible = "renesas,pfc-sh73a0";
  129                 reg = <0xe6050000 0x8000>,
  130                       <0xe605801c 0x1c>;
  131                 gpio-controller;
  132                 #gpio-cells = <2>;
  133                 interrupts-extended =
  134                         <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
  135                         <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
  136                         <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
  137                         <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
  138                         <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
  139                         <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
  140                         <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
  141                         <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
  142         };
  143 
  144 Example 2: A GPIO LED node that references a GPIO
  145 
  146         #include <dt-bindings/gpio/gpio.h>
  147 
  148         leds {
  149                 compatible = "gpio-leds";
  150                 led1 {
  151                         gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
  152                 };
  153         };
  154 
  155 Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
  156            for the MMCIF and SCIFA4 devices
  157 
  158         &pfc {
  159                 pinctrl-0 = <&scifa4_pins>;
  160                 pinctrl-names = "default";
  161 
  162                 mmcif_pins: mmcif {
  163                         mux {
  164                                 groups = "mmc0_data8_0", "mmc0_ctrl_0";
  165                                 function = "mmc0";
  166                         };
  167                         cfg {
  168                                 groups = "mmc0_data8_0";
  169                                 pins = "PORT279";
  170                                 bias-pull-up;
  171                         };
  172                 };
  173 
  174                 scifa4_pins: scifa4 {
  175                         groups = "scifa4_data", "scifa4_ctrl";
  176                         function = "scifa4";
  177                 };
  178         };
  179 
  180 Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
  181 
  182         &mmcif {
  183                 pinctrl-0 = <&mmcif_pins>;
  184                 pinctrl-names = "default";
  185 
  186                 bus-width = <8>;
  187                 vmmc-supply = <&reg_1p8v>;
  188         };

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