renesas,pfc.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Renesas Pin Function Controller (GPIO and Pin Mux/Config)
    8 
    9 maintainers:
   10   - Geert Uytterhoeven <geert+renesas@glider.be>
   11 
   12 description:
   13   The Pin Function Controller (PFC) is a Pin Mux/Config controller.
   14   On SH/R-Mobile SoCs it also acts as a GPIO controller.
   15 
   16 properties:
   17   compatible:
   18     enum:
   19       - renesas,pfc-emev2       # EMMA Mobile EV2
   20       - renesas,pfc-r8a73a4     # R-Mobile APE6
   21       - renesas,pfc-r8a7740     # R-Mobile A1
   22       - renesas,pfc-r8a7742     # RZ/G1H
   23       - renesas,pfc-r8a7743     # RZ/G1M
   24       - renesas,pfc-r8a7744     # RZ/G1N
   25       - renesas,pfc-r8a7745     # RZ/G1E
   26       - renesas,pfc-r8a77470    # RZ/G1C
   27       - renesas,pfc-r8a774a1    # RZ/G2M
   28       - renesas,pfc-r8a774b1    # RZ/G2N
   29       - renesas,pfc-r8a774c0    # RZ/G2E
   30       - renesas,pfc-r8a774e1    # RZ/G2H
   31       - renesas,pfc-r8a7778     # R-Car M1
   32       - renesas,pfc-r8a7779     # R-Car H1
   33       - renesas,pfc-r8a7790     # R-Car H2
   34       - renesas,pfc-r8a7791     # R-Car M2-W
   35       - renesas,pfc-r8a7792     # R-Car V2H
   36       - renesas,pfc-r8a7793     # R-Car M2-N
   37       - renesas,pfc-r8a7794     # R-Car E2
   38       - renesas,pfc-r8a7795     # R-Car H3
   39       - renesas,pfc-r8a7796     # R-Car M3-W
   40       - renesas,pfc-r8a77961    # R-Car M3-W+
   41       - renesas,pfc-r8a77965    # R-Car M3-N
   42       - renesas,pfc-r8a77970    # R-Car V3M
   43       - renesas,pfc-r8a77980    # R-Car V3H
   44       - renesas,pfc-r8a77990    # R-Car E3
   45       - renesas,pfc-r8a77995    # R-Car D3
   46       - renesas,pfc-r8a779a0    # R-Car V3U
   47       - renesas,pfc-r8a779f0    # R-Car S4-8
   48       - renesas,pfc-r8a779g0    # R-Car V4H
   49       - renesas,pfc-sh73a0      # SH-Mobile AG5
   50 
   51   reg:
   52     minItems: 1
   53     maxItems: 10
   54 
   55   gpio-controller: true
   56 
   57   '#gpio-cells':
   58     const: 2
   59 
   60   gpio-ranges:
   61     minItems: 1
   62     maxItems: 16
   63 
   64   interrupts-extended:
   65     minItems: 32
   66     maxItems: 64
   67     description:
   68       Specify the interrupts associated with external IRQ pins on SoCs where
   69       the PFC acts as a GPIO controller.  It must contain one interrupt per
   70       external IRQ, sorted by external IRQ number.
   71 
   72   power-domains:
   73     maxItems: 1
   74 
   75 allOf:
   76   - $ref: "pinctrl.yaml#"
   77 
   78 required:
   79   - compatible
   80   - reg
   81 
   82 if:
   83   properties:
   84     compatible:
   85       enum:
   86         - renesas,pfc-r8a73a4
   87         - renesas,pfc-r8a7740
   88         - renesas,pfc-sh73a0
   89 then:
   90   required:
   91     - interrupts-extended
   92     - gpio-controller
   93     - '#gpio-cells'
   94     - gpio-ranges
   95     - power-domains
   96 
   97 additionalProperties:
   98   anyOf:
   99     - type: object
  100       allOf:
  101         - $ref: pincfg-node.yaml#
  102         - $ref: pinmux-node.yaml#
  103 
  104       description:
  105         Pin controller client devices use pin configuration subnodes (children
  106         and grandchildren) for desired pin configuration.
  107         Client device subnodes use below standard properties.
  108 
  109       properties:
  110         phandle: true
  111         function: true
  112         groups: true
  113         pins: true
  114         bias-disable: true
  115         bias-pull-down: true
  116         bias-pull-up: true
  117         drive-strength:
  118           enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values
  119         power-source:
  120           enum: [ 1800, 3300 ]
  121         gpio-hog: true
  122         gpios: true
  123         input: true
  124         output-high: true
  125         output-low: true
  126 
  127       additionalProperties: false
  128 
  129     - type: object
  130       properties:
  131         phandle: true
  132 
  133       additionalProperties:
  134         $ref: "#/additionalProperties/anyOf/0"
  135 
  136 examples:
  137   - |
  138     pfc: pinctrl@e6050000 {
  139             compatible = "renesas,pfc-r8a7740";
  140             reg = <0xe6050000 0x8000>,
  141                   <0xe605800c 0x20>;
  142             gpio-controller;
  143             #gpio-cells = <2>;
  144             gpio-ranges = <&pfc 0 0 212>;
  145             interrupts-extended =
  146                 <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
  147                 <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
  148                 <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
  149                 <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
  150                 <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
  151                 <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
  152                 <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
  153                 <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
  154             power-domains = <&pd_c5>;
  155 
  156             lcd0-mux-hog {
  157                     /* DBGMD/LCDC0/FSIA MUX */
  158                     gpio-hog;
  159                     gpios = <176 0>;
  160                     output-high;
  161             };
  162     };
  163 
  164   - |
  165     pinctrl@e6060000 {
  166             compatible = "renesas,pfc-r8a7795";
  167             reg = <0xe6060000 0x50c>;
  168 
  169             avb_pins: avb {
  170                     mux {
  171                             groups = "avb_link", "avb_mdio", "avb_mii";
  172                             function = "avb";
  173                     };
  174 
  175                     pins_mdio {
  176                             groups = "avb_mdio";
  177                             drive-strength = <24>;
  178                     };
  179 
  180                     pins_mii_tx {
  181                             pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC",
  182                                    "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2",
  183                                    "PIN_AVB_TD3";
  184                             drive-strength = <12>;
  185                     };
  186             };
  187 
  188             keys_pins: keys {
  189                     pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1";
  190                     bias-pull-up;
  191             };
  192 
  193             sdhi0_pins: sd0 {
  194                     groups = "sdhi0_data4", "sdhi0_ctrl";
  195                     function = "sdhi0";
  196                     power-source = <3300>;
  197             };
  198     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/renesas,pfc.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/renesas,pfc.yaml