renesas,rza1-ports.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Renesas RZ/A1 combined Pin and GPIO controller
    8 
    9 maintainers:
   10   - Jacopo Mondi <jacopo+renesas@jmondi.org>
   11   - Geert Uytterhoeven <geert+renesas@glider.be>
   12 
   13 description:
   14   The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO
   15   controller, named "Ports" in the hardware reference manual.
   16   Pin multiplexing and GPIO configuration is performed on a per-pin basis
   17   writing configuration values to per-port register sets.
   18   Each "port" features up to 16 pins, each of them configurable for GPIO
   19   function (port mode) or in alternate function mode.
   20   Up to 8 different alternate function modes exist for each single pin.
   21 
   22 properties:
   23   compatible:
   24     oneOf:
   25       - const: renesas,r7s72100-ports     # RZ/A1H
   26       - items:
   27           - const: renesas,r7s72101-ports # RZ/A1M
   28           - const: renesas,r7s72100-ports # fallback
   29       - const: renesas,r7s72102-ports     # RZ/A1L
   30 
   31   reg:
   32     maxItems: 1
   33 
   34 allOf:
   35   - $ref: "pinctrl.yaml#"
   36 
   37 required:
   38   - compatible
   39   - reg
   40 
   41 patternProperties:
   42   "^gpio-[0-9]*$":
   43     type: object
   44 
   45     description:
   46       Each port of the r7s72100 pin controller hardware is itself a GPIO
   47       controller.
   48       Different SoCs have different numbers of available pins per port, but
   49       generally speaking, each of them can be configured in GPIO ("port") mode
   50       on this hardware.
   51       Describe GPIO controllers using sub-nodes with the following properties.
   52 
   53     properties:
   54       gpio-controller: true
   55 
   56       '#gpio-cells':
   57         const: 2
   58 
   59       gpio-ranges:
   60         maxItems: 1
   61 
   62     required:
   63       - gpio-controller
   64       - '#gpio-cells'
   65       - gpio-ranges
   66 
   67 
   68 additionalProperties:
   69   anyOf:
   70     - type: object
   71       allOf:
   72         - $ref: pincfg-node.yaml#
   73         - $ref: pinmux-node.yaml#
   74 
   75       description:
   76         A pin multiplexing sub-node describes how to configure a set of (or a
   77         single) pin in some desired alternate function mode.
   78         A single sub-node may define several pin configurations.
   79         A few alternate function require special pin configuration flags to be
   80         supplied along with the alternate function configuration number.
   81         The hardware reference manual specifies when a pin function requires
   82         "software IO driven" mode to be specified. To do so use the generic
   83         properties from the <include/linux/pinctrl/pinconf_generic.h> header
   84         file to instruct the pin controller to perform the desired pin
   85         configuration operation.
   86         The hardware reference manual specifies when a pin has to be configured
   87         to work in bi-directional mode and when the IO direction has to be
   88         specified by software. Bi-directional pins must be managed by the pin
   89         controller driver internally, while software driven IO direction has to
   90         be explicitly selected when multiple options are available.
   91 
   92       properties:
   93         pinmux:
   94           description: |
   95             Integer array representing pin number and pin multiplexing
   96             configuration.
   97             When a pin has to be configured in alternate function mode, use
   98             this property to identify the pin by its global index, and provide
   99             its alternate function configuration number along with it.
  100             When multiple pins are required to be configured as part of the
  101             same alternate function they shall be specified as members of the
  102             same argument list of a single "pinmux" property.
  103             Helper macros to ease assembling the pin index from its position
  104             (port where it sits on and pin number) and alternate function
  105             identifier are provided by the pin controller header file at:
  106             <include/dt-bindings/pinctrl/r7s72100-pinctrl.h>
  107             Integers values in "pinmux" argument list are assembled as:
  108             ((PORT * 16 + PIN) | MUX_FUNC << 16)
  109 
  110         phandle: true
  111         input-enable: true
  112         output-enable: true
  113 
  114       required:
  115         - pinmux
  116 
  117       additionalProperties: false
  118 
  119     - type: object
  120       properties:
  121         phandle: true
  122 
  123       additionalProperties:
  124         $ref: "#/additionalProperties/anyOf/0"
  125 
  126 examples:
  127   - |
  128     #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
  129     pinctrl: pinctrl@fcfe3000 {
  130             compatible = "renesas,r7s72100-ports";
  131 
  132             reg = <0xfcfe3000 0x4230>;
  133 
  134             /*
  135              * A GPIO controller node, controlling 16 pins indexed from 0.
  136              * The GPIO controller base in the global pin indexing space is pin
  137              * 48, thus pins [0 - 15] on this controller map to pins [48 - 63]
  138              * in the global pin indexing space.
  139              */
  140             port3: gpio-3 {
  141                     gpio-controller;
  142                     #gpio-cells = <2>;
  143                     gpio-ranges = <&pinctrl 0 48 16>;
  144             };
  145 
  146             /*
  147              * A serial communication interface with a TX output pin and an RX
  148              * input pin.
  149              * Pin #0 on port #3 is configured as alternate function #6.
  150              * Pin #2 on port #3 is configured as alternate function #4.
  151              */
  152             scif2_pins: serial2 {
  153                     pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
  154             };
  155 
  156 
  157             /*
  158              * I2c master: both SDA and SCL pins need bi-directional operations
  159              * Pin #4 on port #1 is configured as alternate function #1.
  160              * Pin #5 on port #1 is configured as alternate function #1.
  161              * Both need to work in bi-directional mode, the driver must manage
  162              * this internally.
  163              */
  164             i2c2_pins: i2c2 {
  165                     pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
  166             };
  167 
  168 
  169             /*
  170              * Multi-function timer input and output compare pins.
  171              */
  172             tioc0_pins: tioc0 {
  173                     /*
  174                      * Configure TIOC0A as software driven input
  175                      * Pin #0 on port #4 is configured as alternate function #2
  176                      * with IO direction specified by software as input.
  177                      */
  178                     tioc0_input_pins {
  179                             pinmux = <RZA1_PINMUX(4, 0, 2)>;
  180                             input-enable;
  181                     };
  182 
  183                     /*
  184                      * Configure TIOC0B as software driven output
  185                      * Pin #1 on port #4 is configured as alternate function #1
  186                      * with IO direction specified by software as output.
  187                      */
  188                     tioc0_output_pins {
  189                             pinmux = <RZA1_PINMUX(4, 1, 1)>;
  190                             output-enable;
  191                     };
  192             };
  193     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/renesas,rza1-ports.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/pinctrl/renesas,rza1-ports.yaml