rockchip,pinctrl.yaml

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    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/pinctrl/rockchip,pinctrl.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Rockchip Pinmux Controller
    8 
    9 maintainers:
   10   - Heiko Stuebner <heiko@sntech.de>
   11 
   12 description: |
   13   The Rockchip Pinmux Controller enables the IC to share one PAD
   14   to several functional blocks. The sharing is done by multiplexing
   15   the PAD input/output signals. For each PAD there are several muxing
   16   options with option 0 being used as a GPIO.
   17 
   18   Please refer to pinctrl-bindings.txt in this directory for details of the
   19   common pinctrl bindings used by client devices, including the meaning of the
   20   phrase "pin configuration node".
   21 
   22   The Rockchip pin configuration node is a node of a group of pins which can be
   23   used for a specific device or function. This node represents both mux and
   24   config of the pins in that group. The 'pins' selects the function mode
   25   (also named pin mode) this pin can work on and the 'config' configures
   26   various pad settings such as pull-up, etc.
   27 
   28   The pins are grouped into up to 9 individual pin banks which need to be
   29   defined as gpio sub-nodes of the pinmux controller.
   30 
   31 properties:
   32   compatible:
   33     enum:
   34       - rockchip,px30-pinctrl
   35       - rockchip,rk2928-pinctrl
   36       - rockchip,rk3036-pinctrl
   37       - rockchip,rk3066a-pinctrl
   38       - rockchip,rk3066b-pinctrl
   39       - rockchip,rk3128-pinctrl
   40       - rockchip,rk3188-pinctrl
   41       - rockchip,rk3228-pinctrl
   42       - rockchip,rk3288-pinctrl
   43       - rockchip,rk3308-pinctrl
   44       - rockchip,rk3328-pinctrl
   45       - rockchip,rk3368-pinctrl
   46       - rockchip,rk3399-pinctrl
   47       - rockchip,rk3568-pinctrl
   48       - rockchip,rk3588-pinctrl
   49       - rockchip,rv1108-pinctrl
   50 
   51   rockchip,grf:
   52     $ref: "/schemas/types.yaml#/definitions/phandle"
   53     description:
   54       The phandle of the syscon node for the GRF registers.
   55 
   56   rockchip,pmu:
   57     $ref: "/schemas/types.yaml#/definitions/phandle"
   58     description:
   59       The phandle of the syscon node for the PMU registers,
   60       as some SoCs carry parts of the iomux controller registers there.
   61       Required for at least rk3188 and rk3288. On the rk3368 this should
   62       point to the PMUGRF syscon.
   63 
   64   "#address-cells":
   65     enum: [1, 2]
   66 
   67   "#size-cells":
   68     enum: [1, 2]
   69 
   70   ranges: true
   71 
   72 allOf:
   73   - $ref: "pinctrl.yaml#"
   74 
   75 required:
   76   - compatible
   77   - rockchip,grf
   78   - "#address-cells"
   79   - "#size-cells"
   80   - ranges
   81 
   82 patternProperties:
   83   "gpio@[0-9a-f]+$":
   84     type: object
   85 
   86     $ref: "/schemas/gpio/rockchip,gpio-bank.yaml#"
   87 
   88     unevaluatedProperties: false
   89 
   90   "pcfg-[a-z0-9-]+$":
   91     type: object
   92     properties:
   93       bias-disable: true
   94 
   95       bias-pull-down: true
   96 
   97       bias-pull-pin-default: true
   98 
   99       bias-pull-up: true
  100 
  101       drive-strength:
  102         minimum: 0
  103         maximum: 20
  104 
  105       input-enable: true
  106 
  107       input-schmitt-enable: true
  108 
  109       output-high: true
  110 
  111       output-low: true
  112 
  113     additionalProperties: false
  114 
  115 additionalProperties:
  116   type: object
  117   additionalProperties:
  118     type: object
  119     properties:
  120       rockchip,pins:
  121         $ref: "/schemas/types.yaml#/definitions/uint32-matrix"
  122         minItems: 1
  123         items:
  124           items:
  125             - minimum: 0
  126               maximum: 8
  127               description:
  128                 Pin bank.
  129             - minimum: 0
  130               maximum: 31
  131               description:
  132                 Pin bank index.
  133             - minimum: 0
  134               maximum: 10
  135               description:
  136                 Mux 0 means GPIO and mux 1 to N means
  137                 the specific device function.
  138             - description:
  139                 The phandle of a node contains the generic pinconfig options
  140                 to use as described in pinctrl-bindings.txt.
  141 
  142 examples:
  143   - |
  144     #include <dt-bindings/interrupt-controller/arm-gic.h>
  145     #include <dt-bindings/pinctrl/rockchip.h>
  146 
  147     pinctrl: pinctrl {
  148       compatible = "rockchip,rk3066a-pinctrl";
  149       rockchip,grf = <&grf>;
  150 
  151       #address-cells = <1>;
  152       #size-cells = <1>;
  153       ranges;
  154 
  155       gpio0: gpio@20034000 {
  156         compatible = "rockchip,gpio-bank";
  157         reg = <0x20034000 0x100>;
  158         interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
  159         clocks = <&clk_gates8 9>;
  160 
  161         gpio-controller;
  162         #gpio-cells = <2>;
  163 
  164         interrupt-controller;
  165         #interrupt-cells = <2>;
  166       };
  167 
  168       pcfg_pull_default: pcfg-pull-default {
  169         bias-pull-pin-default;
  170       };
  171 
  172       uart2 {
  173         uart2_xfer: uart2-xfer {
  174           rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>,
  175                           <1 RK_PB1 1 &pcfg_pull_default>;
  176         };
  177       };
  178     };
  179 
  180     uart2: serial@20064000 {
  181       compatible = "snps,dw-apb-uart";
  182       reg = <0x20064000 0x400>;
  183       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
  184       clocks = <&mux_uart2>;
  185       pinctrl-0 = <&uart2_xfer>;
  186       pinctrl-names = "default";
  187       reg-io-width = <1>;
  188       reg-shift = <2>;
  189     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/rockchip,pinctrl.yaml

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sys/contrib/device-tree/Bindings/pinctrl/rockchip,pinctrl.yaml