samsung,pinctrl.yaml

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    1 # SPDX-License-Identifier: GPL-2.0-only
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Samsung S3C/S5P/Exynos SoC pin controller
    8 
    9 maintainers:
   10   - Krzysztof Kozlowski <krzk@kernel.org>
   11   - Sylwester Nawrocki <s.nawrocki@samsung.com>
   12   - Tomasz Figa <tomasz.figa@gmail.com>
   13 
   14 description: |
   15   This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
   16   controller.
   17 
   18   Pin group settings (like drive strength, pull up/down) are available as
   19   macros in include/dt-bindings/pinctrl/samsung.h.
   20 
   21   All the pin controller nodes should be represented in the aliases node using
   22   the following format 'pinctrl{n}' where n is a unique number for the alias.
   23 
   24   The controller supports three types of interrupts::
   25    - External GPIO interrupts (see interrupts property in pin controller node);
   26 
   27    - External wake-up interrupts - multiplexed (capable of waking up the system
   28      see interrupts property in external wake-up interrupt controller node -
   29      samsung,pinctrl-wakeup-interrupt.yaml);
   30 
   31    - External wake-up interrupts - direct (capable of waking up the system, see
   32      interrupts property in every bank of pin controller with external wake-up
   33      interrupt controller - samsung,pinctrl-gpio-bank.yaml).
   34 
   35 properties:
   36   $nodename:
   37     pattern: "^pinctrl(@.*)?"
   38 
   39   compatible:
   40     enum:
   41       - samsung,s3c2412-pinctrl
   42       - samsung,s3c2416-pinctrl
   43       - samsung,s3c2440-pinctrl
   44       - samsung,s3c2450-pinctrl
   45       - samsung,s3c64xx-pinctrl
   46       - samsung,s5pv210-pinctrl
   47       - samsung,exynos3250-pinctrl
   48       - samsung,exynos4210-pinctrl
   49       - samsung,exynos4x12-pinctrl
   50       - samsung,exynos5250-pinctrl
   51       - samsung,exynos5260-pinctrl
   52       - samsung,exynos5410-pinctrl
   53       - samsung,exynos5420-pinctrl
   54       - samsung,exynos5433-pinctrl
   55       - samsung,exynos7-pinctrl
   56       - samsung,exynos7885-pinctrl
   57       - samsung,exynos850-pinctrl
   58       - samsung,exynosautov9-pinctrl
   59       - tesla,fsd-pinctrl
   60 
   61   interrupts:
   62     description:
   63       Required for GPIO banks supporting external GPIO interrupts.
   64     maxItems: 1
   65 
   66   power-domains:
   67     maxItems: 1
   68 
   69   reg:
   70     description:
   71       Second base address of the pin controller if the specific registers of
   72       the pin controller are separated into the different base address.
   73       Only certain banks of certain pin controller might need it.
   74     minItems: 1
   75     maxItems: 2
   76 
   77   wakeup-interrupt-controller:
   78     $ref: samsung,pinctrl-wakeup-interrupt.yaml
   79 
   80 patternProperties:
   81   "^[a-z]+[0-9]*-gpio-bank$":
   82     description:
   83       Pin banks of the controller are represented by child nodes of the
   84       controller node. Bank name is taken from name of the node.
   85     $ref: samsung,pinctrl-gpio-bank.yaml
   86 
   87   "^[a-z0-9-]+-pins$":
   88     oneOf:
   89       - $ref: samsung,pinctrl-pins-cfg.yaml
   90         required:
   91           - samsung,pins
   92       - type: object
   93         patternProperties:
   94           "^[a-z0-9-]+-pins$":
   95             $ref: samsung,pinctrl-pins-cfg.yaml
   96 
   97         additionalProperties: false
   98 
   99   "^(initial|sleep)-state$":
  100     patternProperties:
  101       "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$":
  102         $ref: samsung,pinctrl-pins-cfg.yaml
  103 
  104         properties:
  105           samsung,pins:
  106             description: See samsung,pinctrl-pins-cfg.yaml
  107             $ref: /schemas/types.yaml#/definitions/string-array
  108             maxItems: 1
  109 
  110         required:
  111           - samsung,pins
  112 
  113         unevaluatedProperties: false
  114 
  115 required:
  116   - compatible
  117   - reg
  118 
  119 allOf:
  120   - $ref: "pinctrl.yaml#"
  121   - if:
  122       properties:
  123         compatible:
  124           contains:
  125             const: samsung,exynos5433-pinctrl
  126     then:
  127       properties:
  128         reg:
  129           minItems: 1
  130           maxItems: 2
  131     else:
  132       properties:
  133         reg:
  134           minItems: 1
  135           maxItems: 1
  136 
  137 additionalProperties: false
  138 
  139 examples:
  140   - |
  141     #include <dt-bindings/pinctrl/samsung.h>
  142 
  143     pinctrl@7f008000 {
  144         compatible = "samsung,s3c64xx-pinctrl";
  145         reg = <0x7f008000 0x1000>;
  146         interrupt-parent = <&vic1>;
  147         interrupts = <21>;
  148 
  149         wakeup-interrupt-controller {
  150             compatible = "samsung,s3c64xx-wakeup-eint";
  151             interrupts-extended = <&vic0 0>,
  152                                   <&vic0 1>,
  153                                   <&vic1 0>,
  154                                   <&vic1 1>;
  155         };
  156 
  157         /* Pin bank with external GPIO or muxed external wake-up interrupts */
  158         gpa-gpio-bank {
  159             gpio-controller;
  160             #gpio-cells = <2>;
  161             interrupt-controller;
  162             #interrupt-cells = <2>;
  163         };
  164 
  165         // ...
  166 
  167         uart0-data-pins {
  168             samsung,pins = "gpa-0", "gpa-1";
  169             samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  170             samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
  171         };
  172 
  173         // ...
  174     };
  175 
  176   - |
  177     #include <dt-bindings/interrupt-controller/arm-gic.h>
  178     #include <dt-bindings/pinctrl/samsung.h>
  179 
  180     pinctrl@11400000 {
  181         compatible = "samsung,exynos4210-pinctrl";
  182         reg = <0x11400000 0x1000>;
  183         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
  184 
  185         pinctrl-names = "default";
  186         pinctrl-0 = <&sleep0>;
  187 
  188         /* Pin bank with external GPIO or muxed external wake-up interrupts */
  189         gpa0-gpio-bank {
  190             gpio-controller;
  191             #gpio-cells = <2>;
  192             interrupt-controller;
  193             #interrupt-cells = <2>;
  194         };
  195 
  196         // ...
  197 
  198         uart0-data-pins {
  199             samsung,pins = "gpa0-0", "gpa0-1";
  200             samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  201             samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  202             samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
  203         };
  204 
  205         // ...
  206 
  207         sleep0: sleep-state {
  208             gpa0-0-pin {
  209                 samsung,pins = "gpa0-0";
  210                 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_INPUT>;
  211                 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
  212             };
  213 
  214             gpa0-1-pin {
  215                 samsung,pins = "gpa0-1";
  216                 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_OUT0>;
  217                 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
  218             };
  219 
  220             // ...
  221         };
  222     };
  223 
  224   - |
  225     #include <dt-bindings/interrupt-controller/arm-gic.h>
  226     #include <dt-bindings/pinctrl/samsung.h>
  227 
  228     pinctrl@11000000 {
  229         compatible = "samsung,exynos4210-pinctrl";
  230         reg = <0x11000000 0x1000>;
  231         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
  232 
  233         wakeup-interrupt-controller {
  234             compatible = "samsung,exynos4210-wakeup-eint";
  235             interrupt-parent = <&gic>;
  236             interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  237         };
  238 
  239         /* Pin bank with external GPIO or muxed external wake-up interrupts */
  240         gpj0-gpio-bank {
  241             gpio-controller;
  242             #gpio-cells = <2>;
  243             interrupt-controller;
  244             #interrupt-cells = <2>;
  245         };
  246 
  247         /* Pin bank without external interrupts */
  248         gpy0-gpio-bank {
  249             gpio-controller;
  250             #gpio-cells = <2>;
  251         };
  252 
  253         /* Pin bank with external direct wake-up interrupts */
  254         gpx0-gpio-bank {
  255             gpio-controller;
  256             #gpio-cells = <2>;
  257 
  258             interrupt-controller;
  259             interrupt-parent = <&gic>;
  260             interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
  261                          <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
  262                          <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
  263                          <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
  264                          <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
  265                          <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
  266                          <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
  267                          <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
  268             #interrupt-cells = <2>;
  269         };
  270 
  271         // ...
  272 
  273         sd0-clk-pins {
  274             samsung,pins = "gpk0-0";
  275             samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  276             samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  277             samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
  278         };
  279 
  280         sd4-bus-width8-pins {
  281             part-1-pins {
  282                 samsung,pins = "gpk0-3", "gpk0-4",
  283                                "gpk0-5", "gpk0-6";
  284                 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
  285                 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
  286                 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
  287             };
  288 
  289             part-2-pins {
  290                 samsung,pins = "gpk1-3", "gpk1-4",
  291                                "gpk1-5", "gpk1-6";
  292                 samsung,pin-function = <EXYNOS_PIN_FUNC_4>;
  293                 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
  294                 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>;
  295             };
  296         };
  297 
  298         // ...
  299 
  300         otg-gp-pins {
  301             samsung,pins = "gpx3-3";
  302             samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
  303             samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  304             samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
  305             samsung,pin-val = <0>;
  306         };
  307     };
  308 
  309   - |
  310     #include <dt-bindings/interrupt-controller/arm-gic.h>
  311     #include <dt-bindings/pinctrl/samsung.h>
  312 
  313     pinctrl@10580000 {
  314         compatible = "samsung,exynos5433-pinctrl";
  315         reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
  316 
  317         pinctrl-names = "default";
  318         pinctrl-0 = <&initial_alive>;
  319 
  320         wakeup-interrupt-controller {
  321             compatible = "samsung,exynos7-wakeup-eint";
  322             interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
  323         };
  324 
  325         /* Pin bank with external direct wake-up interrupts */
  326         gpa0-gpio-bank {
  327             gpio-controller;
  328             #gpio-cells = <2>;
  329 
  330             interrupt-controller;
  331             interrupt-parent = <&gic>;
  332             interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  333                          <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  334                          <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  335                          <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
  336                          <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
  337                          <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
  338                          <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
  339                          <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  340             #interrupt-cells = <2>;
  341         };
  342 
  343         // ...
  344 
  345         te-irq-pins {
  346             samsung,pins = "gpf1-3";
  347             samsung,pin-function = <0xf>;
  348         };
  349 
  350         // ..
  351 
  352         initial_alive: initial-state {
  353             gpa0-0-pin {
  354                 samsung,pins = "gpa0-0";
  355                 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
  356                 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
  357                 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
  358             };
  359 
  360             // ...
  361         };
  362     };
  363 
  364   - |
  365     #include <dt-bindings/interrupt-controller/arm-gic.h>
  366     #include <dt-bindings/pinctrl/samsung.h>
  367 
  368     pinctrl@114b0000 {
  369         compatible = "samsung,exynos5433-pinctrl";
  370         reg = <0x114b0000 0x1000>;
  371         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
  372         power-domains = <&pd_aud>;
  373 
  374         /* Pin bank with external GPIO or muxed external wake-up interrupts */
  375         gpz0-gpio-bank {
  376             gpio-controller;
  377             #gpio-cells = <2>;
  378             interrupt-controller;
  379             #interrupt-cells = <2>;
  380         };
  381 
  382         // ...
  383 
  384         i2s0-bus-pins {
  385             samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",
  386                            "gpz0-4", "gpz0-5", "gpz0-6";
  387             samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  388             samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  389             samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
  390         };
  391 
  392         // ...
  393     };
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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/pinctrl/samsung,pinctrl.yaml

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sys/contrib/device-tree/Bindings/pinctrl/samsung,pinctrl.yaml
