rockchip,power-controller.yaml

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    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Rockchip Power Domains
    8 
    9 maintainers:
   10   - Elaine Zhang <zhangqing@rock-chips.com>
   11   - Heiko Stuebner <heiko@sntech.de>
   12 
   13 description: |
   14   Rockchip processors include support for multiple power domains
   15   which can be powered up/down by software based on different
   16   application scenarios to save power.
   17 
   18   Power domains contained within power-controller node are
   19   generic power domain providers documented in
   20   Documentation/devicetree/bindings/power/power-domain.yaml.
   21 
   22   IP cores belonging to a power domain should contain a
   23   "power-domains" property that is a phandle for the
   24   power domain node representing the domain.
   25 
   26 properties:
   27   $nodename:
   28     const: power-controller
   29 
   30   compatible:
   31     enum:
   32       - rockchip,px30-power-controller
   33       - rockchip,rk3036-power-controller
   34       - rockchip,rk3066-power-controller
   35       - rockchip,rk3128-power-controller
   36       - rockchip,rk3188-power-controller
   37       - rockchip,rk3228-power-controller
   38       - rockchip,rk3288-power-controller
   39       - rockchip,rk3328-power-controller
   40       - rockchip,rk3366-power-controller
   41       - rockchip,rk3368-power-controller
   42       - rockchip,rk3399-power-controller
   43       - rockchip,rk3568-power-controller
   44 
   45   "#power-domain-cells":
   46     const: 1
   47 
   48   "#address-cells":
   49     const: 1
   50 
   51   "#size-cells":
   52     const: 0
   53 
   54 required:
   55   - compatible
   56   - "#power-domain-cells"
   57 
   58 additionalProperties: false
   59 
   60 patternProperties:
   61   "^power-domain@[0-9a-f]+$":
   62 
   63     $ref: "#/$defs/pd-node"
   64 
   65     unevaluatedProperties: false
   66 
   67     properties:
   68       "#address-cells":
   69         const: 1
   70 
   71       "#size-cells":
   72         const: 0
   73 
   74     patternProperties:
   75       "^power-domain@[0-9a-f]+$":
   76 
   77         $ref: "#/$defs/pd-node"
   78 
   79         unevaluatedProperties: false
   80 
   81         properties:
   82           "#address-cells":
   83             const: 1
   84 
   85           "#size-cells":
   86             const: 0
   87 
   88         patternProperties:
   89           "^power-domain@[0-9a-f]+$":
   90 
   91             $ref: "#/$defs/pd-node"
   92 
   93             unevaluatedProperties: false
   94 
   95             properties:
   96               "#power-domain-cells":
   97                 const: 0
   98 
   99 $defs:
  100   pd-node:
  101     type: object
  102     description: |
  103       Represents the power domains within the power controller node.
  104 
  105     properties:
  106       reg:
  107         maxItems: 1
  108         description: |
  109           Power domain index. Valid values are defined in
  110           "include/dt-bindings/power/px30-power.h"
  111           "include/dt-bindings/power/rk3036-power.h"
  112           "include/dt-bindings/power/rk3066-power.h"
  113           "include/dt-bindings/power/rk3128-power.h"
  114           "include/dt-bindings/power/rk3188-power.h"
  115           "include/dt-bindings/power/rk3228-power.h"
  116           "include/dt-bindings/power/rk3288-power.h"
  117           "include/dt-bindings/power/rk3328-power.h"
  118           "include/dt-bindings/power/rk3366-power.h"
  119           "include/dt-bindings/power/rk3368-power.h"
  120           "include/dt-bindings/power/rk3399-power.h"
  121           "include/dt-bindings/power/rk3568-power.h"
  122 
  123       clocks:
  124         minItems: 1
  125         maxItems: 30
  126         description: |
  127           A number of phandles to clocks that need to be enabled
  128           while power domain switches state.
  129 
  130       pm_qos:
  131         $ref: /schemas/types.yaml#/definitions/phandle-array
  132         items:
  133           maxItems: 1
  134         description: |
  135           A number of phandles to qos blocks which need to be saved and restored
  136           while power domain switches state.
  137 
  138       "#power-domain-cells":
  139         enum: [0, 1]
  140         description:
  141           Must be 0 for nodes representing a single PM domain and 1 for nodes
  142           providing multiple PM domains.
  143 
  144     required:
  145       - reg
  146       - "#power-domain-cells"
  147 
  148 examples:
  149   - |
  150     #include <dt-bindings/clock/rk3399-cru.h>
  151     #include <dt-bindings/power/rk3399-power.h>
  152 
  153     soc {
  154         #address-cells = <2>;
  155         #size-cells = <2>;
  156 
  157         qos_hdcp: qos@ffa90000 {
  158             compatible = "rockchip,rk3399-qos", "syscon";
  159             reg = <0x0 0xffa90000 0x0 0x20>;
  160         };
  161 
  162         qos_iep: qos@ffa98000 {
  163             compatible = "rockchip,rk3399-qos", "syscon";
  164             reg = <0x0 0xffa98000 0x0 0x20>;
  165         };
  166 
  167         qos_rga_r: qos@ffab0000 {
  168             compatible = "rockchip,rk3399-qos", "syscon";
  169             reg = <0x0 0xffab0000 0x0 0x20>;
  170         };
  171 
  172         qos_rga_w: qos@ffab0080 {
  173             compatible = "rockchip,rk3399-qos", "syscon";
  174             reg = <0x0 0xffab0080 0x0 0x20>;
  175         };
  176 
  177         qos_video_m0: qos@ffab8000 {
  178             compatible = "rockchip,rk3399-qos", "syscon";
  179             reg = <0x0 0xffab8000 0x0 0x20>;
  180         };
  181 
  182         qos_video_m1_r: qos@ffac0000 {
  183             compatible = "rockchip,rk3399-qos", "syscon";
  184             reg = <0x0 0xffac0000 0x0 0x20>;
  185         };
  186 
  187         qos_video_m1_w: qos@ffac0080 {
  188             compatible = "rockchip,rk3399-qos", "syscon";
  189             reg = <0x0 0xffac0080 0x0 0x20>;
  190         };
  191 
  192         power-management@ff310000 {
  193             compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
  194             reg = <0x0 0xff310000 0x0 0x1000>;
  195 
  196             power-controller {
  197                 compatible = "rockchip,rk3399-power-controller";
  198                 #power-domain-cells = <1>;
  199                 #address-cells = <1>;
  200                 #size-cells = <0>;
  201 
  202                 /* These power domains are grouped by VD_CENTER */
  203                 power-domain@RK3399_PD_IEP {
  204                     reg = <RK3399_PD_IEP>;
  205                     clocks = <&cru ACLK_IEP>,
  206                              <&cru HCLK_IEP>;
  207                     pm_qos = <&qos_iep>;
  208                     #power-domain-cells = <0>;
  209                 };
  210                 power-domain@RK3399_PD_RGA {
  211                     reg = <RK3399_PD_RGA>;
  212                     clocks = <&cru ACLK_RGA>,
  213                              <&cru HCLK_RGA>;
  214                     pm_qos = <&qos_rga_r>,
  215                              <&qos_rga_w>;
  216                     #power-domain-cells = <0>;
  217                 };
  218                 power-domain@RK3399_PD_VCODEC {
  219                     reg = <RK3399_PD_VCODEC>;
  220                     clocks = <&cru ACLK_VCODEC>,
  221                              <&cru HCLK_VCODEC>;
  222                     pm_qos = <&qos_video_m0>;
  223                     #power-domain-cells = <0>;
  224                 };
  225                 power-domain@RK3399_PD_VDU {
  226                     reg = <RK3399_PD_VDU>;
  227                     clocks = <&cru ACLK_VDU>,
  228                              <&cru HCLK_VDU>;
  229                     pm_qos = <&qos_video_m1_r>,
  230                              <&qos_video_m1_w>;
  231                     #power-domain-cells = <0>;
  232                 };
  233                 power-domain@RK3399_PD_VIO {
  234                     reg = <RK3399_PD_VIO>;
  235                     #power-domain-cells = <1>;
  236                     #address-cells = <1>;
  237                     #size-cells = <0>;
  238 
  239                     power-domain@RK3399_PD_HDCP {
  240                         reg = <RK3399_PD_HDCP>;
  241                         clocks = <&cru ACLK_HDCP>,
  242                                  <&cru HCLK_HDCP>,
  243                                  <&cru PCLK_HDCP>;
  244                         pm_qos = <&qos_hdcp>;
  245                         #power-domain-cells = <0>;
  246                     };
  247                 };
  248             };
  249         };
  250     };

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sys/contrib/device-tree/Bindings/power/rockchip,power-controller.yaml