The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/powerpc/fsl/cache_sram.txt

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    1 * Freescale PQ3 and QorIQ based Cache SRAM
    2 
    3 Freescale's mpc85xx and some QorIQ platforms provide an
    4 option of configuring a part of (or full) cache memory
    5 as SRAM. This cache SRAM representation in the device
    6 tree should be done as under:-
    7 
    8 Required properties:
    9 
   10 - compatible : should be "fsl,p2020-cache-sram"
   11 - fsl,cache-sram-ctlr-handle : points to the L2 controller
   12 - reg : offset and length of the cache-sram.
   13 
   14 Example:
   15 
   16 cache-sram@fff00000 {
   17         fsl,cache-sram-ctlr-handle = <&L2>;
   18         reg = <0 0xfff00000 0 0x10000>;
   19         compatible = "fsl,p2020-cache-sram";
   20 };

Cache object: db4158dce7fb8202743b1c88606153ec


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