The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/powerpc/fsl/cpus.txt

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10  
    1 ===================================================================
    2 Power Architecture CPU Binding
    3 Copyright 2013 Freescale Semiconductor Inc.
    4 
    5 Power Architecture CPUs in Freescale SOCs are represented in device trees as
    6 per the definition in the Devicetree Specification.
    7 
    8 In addition to the Devicetree Specification definitions, the properties
    9 defined below may be present on CPU nodes.
   10 
   11 PROPERTIES
   12 
   13    - fsl,eref-*
   14         Usage: optional
   15         Value type: <empty>
   16         Definition: The EREF (EREF: A Programmer.s Reference Manual for
   17         Freescale Power Architecture) defines the architecture for Freescale
   18         Power CPUs.  The EREF defines some architecture categories not defined
   19         by the Power ISA.  For these EREF-specific categories, the existence of
   20         a property named fsl,eref-[CAT], where [CAT] is the abbreviated category
   21         name with all uppercase letters converted to lowercase, indicates that
   22         the category is supported by the implementation.
   23 
   24     - fsl,portid-mapping
   25         Usage: optional
   26         Value type: <u32>
   27         Definition: The Coherency Subdomain ID Port Mapping Registers and
   28         Snoop ID Port Mapping registers, which are part of the CoreNet
   29         Coherency fabric (CCF), provide a CoreNet Coherency Subdomain
   30         ID/CoreNet Snoop ID to cpu mapping functions.  Certain bits from
   31         these registers should be set if the coresponding CPU should be
   32         snooped.  This property defines a bitmask which selects the bit
   33         that should be set if this cpu should be snooped.

Cache object: f15b8651a8d9428e9ccf218e8610aaa2

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.