1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,tpu-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Renesas R-Car Timer Pulse Unit PWM Controller
8
9 maintainers:
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11
12 select:
13 properties:
14 compatible:
15 contains:
16 const: renesas,tpu
17 required:
18 - compatible
19 - '#pwm-cells'
20
21 properties:
22 compatible:
23 items:
24 - enum:
25 - renesas,tpu-r8a73a4 # R-Mobile APE6
26 - renesas,tpu-r8a7740 # R-Mobile A1
27 - renesas,tpu-r8a7742 # RZ/G1H
28 - renesas,tpu-r8a7743 # RZ/G1M
29 - renesas,tpu-r8a7744 # RZ/G1N
30 - renesas,tpu-r8a7745 # RZ/G1E
31 - renesas,tpu-r8a7790 # R-Car H2
32 - renesas,tpu-r8a7791 # R-Car M2-W
33 - renesas,tpu-r8a7792 # R-Car V2H
34 - renesas,tpu-r8a7793 # R-Car M2-N
35 - renesas,tpu-r8a7794 # R-Car E2
36 - renesas,tpu-r8a7795 # R-Car H3
37 - renesas,tpu-r8a7796 # R-Car M3-W
38 - renesas,tpu-r8a77961 # R-Car M3-W+
39 - renesas,tpu-r8a77965 # R-Car M3-N
40 - renesas,tpu-r8a77970 # R-Car V3M
41 - renesas,tpu-r8a77980 # R-Car V3H
42 - renesas,tpu-r8a779a0 # R-Car V3U
43 - const: renesas,tpu
44
45 reg:
46 # Base address and length of each memory resource used by the PWM
47 # controller hardware module.
48 maxItems: 1
49
50 interrupts:
51 maxItems: 1
52
53 '#pwm-cells':
54 # should be 3. See pwm.yaml in this directory for a description of
55 # the cells format. The only third cell flag supported by this binding is
56 # PWM_POLARITY_INVERTED.
57 const: 3
58
59 clocks:
60 maxItems: 1
61
62 power-domains:
63 maxItems: 1
64
65 resets:
66 maxItems: 1
67
68 required:
69 - compatible
70 - reg
71 - clocks
72 - power-domains
73
74 allOf:
75 - $ref: pwm.yaml#
76
77 - if:
78 not:
79 properties:
80 compatible:
81 contains:
82 enum:
83 - renesas,tpu-r8a73a4
84 - renesas,tpu-r8a7740
85 then:
86 required:
87 - resets
88
89 additionalProperties: false
90
91 examples:
92 - |
93 #include <dt-bindings/clock/r8a7740-clock.h>
94
95 tpu: pwm@e6600000 {
96 compatible = "renesas,tpu-r8a7740", "renesas,tpu";
97 reg = <0xe6600000 0x148>;
98 clocks = <&mstp3_clks R8A7740_CLK_TPU0>;
99 power-domains = <&pd_a3sp>;
100 #pwm-cells = <3>;
101 };
Cache object: b357fc3e99ee7571d4248520432f34e8
|