qcom,sc7280-wpss-pil.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm SC7280 WPSS Peripheral Image Loader
    8 
    9 maintainers:
   10   - Bjorn Andersson <bjorn.andersson@linaro.org>
   11 
   12 description:
   13   This document defines the binding for a component that loads and boots firmware
   14   on the Qualcomm Technology Inc. WPSS.
   15 
   16 properties:
   17   compatible:
   18     enum:
   19       - qcom,sc7280-wpss-pil
   20 
   21   reg:
   22     maxItems: 1
   23     description:
   24       The base address and size of the qdsp6ss register
   25 
   26   interrupts:
   27     items:
   28       - description: Watchdog interrupt
   29       - description: Fatal interrupt
   30       - description: Ready interrupt
   31       - description: Handover interrupt
   32       - description: Stop acknowledge interrupt
   33       - description: Shutdown acknowledge interrupt
   34 
   35   interrupt-names:
   36     items:
   37       - const: wdog
   38       - const: fatal
   39       - const: ready
   40       - const: handover
   41       - const: stop-ack
   42       - const: shutdown-ack
   43 
   44   clocks:
   45     items:
   46       - description: GCC WPSS AHB BDG Master clock
   47       - description: GCC WPSS AHB clock
   48       - description: GCC WPSS RSCP clock
   49       - description: XO clock
   50 
   51   clock-names:
   52     items:
   53       - const: ahb_bdg
   54       - const: ahb
   55       - const: rscp
   56       - const: xo
   57 
   58   power-domains:
   59     items:
   60       - description: CX power domain
   61       - description: MX power domain
   62 
   63   power-domain-names:
   64     items:
   65       - const: cx
   66       - const: mx
   67 
   68   resets:
   69     items:
   70       - description: AOSS restart
   71       - description: PDC SYNC
   72 
   73   reset-names:
   74     items:
   75       - const: restart
   76       - const: pdc_sync
   77 
   78   memory-region:
   79     maxItems: 1
   80     description: Reference to the reserved-memory for the Hexagon core
   81 
   82   firmware-name:
   83     $ref: /schemas/types.yaml#/definitions/string
   84     description:
   85       The name of the firmware which should be loaded for this remote
   86       processor.
   87 
   88   qcom,halt-regs:
   89     $ref: /schemas/types.yaml#/definitions/phandle-array
   90     description:
   91       Phandle reference to a syscon representing TCSR followed by the
   92       three offsets within syscon for q6, modem and nc halt registers.
   93 
   94   qcom,qmp:
   95     $ref: /schemas/types.yaml#/definitions/phandle
   96     description: Reference to the AOSS side-channel message RAM.
   97 
   98   qcom,smem-states:
   99     $ref: /schemas/types.yaml#/definitions/phandle-array
  100     description: States used by the AP to signal the Hexagon core
  101     items:
  102       - description: Stop the modem
  103 
  104   qcom,smem-state-names:
  105     description: The names of the state bits used for SMP2P output
  106     const: stop
  107 
  108   glink-edge:
  109     $ref: qcom,glink-edge.yaml#
  110     description:
  111       Qualcomm G-Link subnode which represents communication edge, channels
  112       and devices related to the ADSP.
  113 
  114     properties:
  115       interrupts:
  116         items:
  117           - description: IRQ from WPSS to GLINK
  118 
  119       mboxes:
  120         items:
  121           - description: Mailbox for communication between APPS and WPSS
  122 
  123       label:
  124         items:
  125           - const: wpss
  126 
  127       apr: false
  128       fastrpc: false
  129 
  130 required:
  131   - compatible
  132   - reg
  133   - interrupts
  134   - interrupt-names
  135   - clocks
  136   - clock-names
  137   - power-domains
  138   - power-domain-names
  139   - resets
  140   - reset-names
  141   - qcom,halt-regs
  142   - memory-region
  143   - qcom,qmp
  144   - qcom,smem-states
  145   - qcom,smem-state-names
  146   - glink-edge
  147 
  148 additionalProperties: false
  149 
  150 examples:
  151   - |
  152     #include <dt-bindings/interrupt-controller/arm-gic.h>
  153     #include <dt-bindings/clock/qcom,gcc-sc7280.h>
  154     #include <dt-bindings/clock/qcom,rpmh.h>
  155     #include <dt-bindings/power/qcom-rpmpd.h>
  156     #include <dt-bindings/reset/qcom,sdm845-aoss.h>
  157     #include <dt-bindings/reset/qcom,sdm845-pdc.h>
  158     #include <dt-bindings/mailbox/qcom-ipcc.h>
  159     remoteproc@8a00000 {
  160         compatible = "qcom,sc7280-wpss-pil";
  161         reg = <0x08a00000 0x10000>;
  162 
  163         interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
  164                               <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
  165                               <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
  166                               <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
  167                               <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
  168                               <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
  169         interrupt-names = "wdog", "fatal", "ready", "handover",
  170                           "stop-ack", "shutdown-ack";
  171 
  172         clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
  173                  <&gcc GCC_WPSS_AHB_CLK>,
  174                  <&gcc GCC_WPSS_RSCP_CLK>,
  175                  <&rpmhcc RPMH_CXO_CLK>;
  176         clock-names = "ahb_bdg", "ahb",
  177                       "rscp", "xo";
  178 
  179         power-domains = <&rpmhpd SC7280_CX>,
  180                         <&rpmhpd SC7280_MX>;
  181         power-domain-names = "cx", "mx";
  182 
  183         memory-region = <&wpss_mem>;
  184 
  185         qcom,qmp = <&aoss_qmp>;
  186 
  187         qcom,smem-states = <&wpss_smp2p_out 0>;
  188         qcom,smem-state-names = "stop";
  189 
  190         resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
  191                  <&pdc_reset PDC_WPSS_SYNC_RESET>;
  192         reset-names = "restart", "pdc_sync";
  193 
  194         qcom,halt-regs = <&tcsr_mutex 0x37000>;
  195 
  196         glink-edge {
  197             interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
  198                                          IPCC_MPROC_SIGNAL_GLINK_QMP
  199                                          IRQ_TYPE_EDGE_RISING>;
  200             mboxes = <&ipcc IPCC_CLIENT_WPSS
  201                             IPCC_MPROC_SIGNAL_GLINK_QMP>;
  202 
  203             label = "wpss";
  204             qcom,remote-pid = <13>;
  205         };
  206     };

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sys/contrib/device-tree/Bindings/remoteproc/qcom,sc7280-wpss-pil.yaml