The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/remoteproc/ti,k3-dsp-rproc.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: TI K3 DSP devices
    8 
    9 maintainers:
   10   - Suman Anna <s-anna@ti.com>
   11 
   12 description: |
   13   The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
   14   that are used to offload some of the processor-intensive tasks or algorithms,
   15   for achieving various system level goals.
   16 
   17   These processor sub-systems usually contain additional sub-modules like
   18   L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
   19   controller, a dedicated local power/sleep controller etc. The DSP processor
   20   cores in the K3 SoCs are usually either a TMS320C66x CorePac processor or a
   21   TMS320C71x CorePac processor.
   22 
   23   Each DSP Core sub-system is represented as a single DT node. Each node has a
   24   number of required or optional properties that enable the OS running on the
   25   host processor (Arm CorePac) to perform the device management of the remote
   26   processor and to communicate with the remote processor.
   27 
   28 allOf:
   29   - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
   30 
   31 properties:
   32   compatible:
   33     enum:
   34       - ti,j721e-c66-dsp
   35       - ti,j721e-c71-dsp
   36       - ti,j721s2-c71-dsp
   37     description:
   38       Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
   39       Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
   40       Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs
   41 
   42   resets:
   43     description: |
   44       Should contain the phandle to the reset controller node managing the
   45       local resets for this device, and a reset specifier.
   46     maxItems: 1
   47 
   48   firmware-name:
   49     description: |
   50       Should contain the name of the default firmware image
   51       file located on the firmware search path
   52 
   53   mboxes:
   54     description: |
   55       OMAP Mailbox specifier denoting the sub-mailbox, to be used for
   56       communication with the remote processor. This property should match
   57       with the sub-mailbox node used in the firmware image.
   58     maxItems: 1
   59 
   60   memory-region:
   61     minItems: 2
   62     maxItems: 8
   63     description: |
   64       phandle to the reserved memory nodes to be associated with the remoteproc
   65       device. There should be at least two reserved memory nodes defined. The
   66       reserved memory nodes should be carveout nodes, and should be defined as
   67       per the bindings in
   68       Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
   69     items:
   70       - description: region used for dynamic DMA allocations like vrings and
   71                      vring buffers
   72       - description: region reserved for firmware image sections
   73     additionalItems: true
   74 
   75 # Optional properties:
   76 # --------------------
   77 
   78   sram:
   79     $ref: /schemas/types.yaml#/definitions/phandle-array
   80     minItems: 1
   81     maxItems: 4
   82     items:
   83       maxItems: 1
   84     description: |
   85       phandles to one or more reserved on-chip SRAM regions. The regions
   86       should be defined as child nodes of the respective SRAM node, and
   87       should be defined as per the generic bindings in,
   88       Documentation/devicetree/bindings/sram/sram.yaml
   89 
   90 if:
   91   properties:
   92     compatible:
   93       enum:
   94         - ti,j721e-c66-dsp
   95 then:
   96   properties:
   97     reg:
   98       items:
   99         - description: Address and Size of the L2 SRAM internal memory region
  100         - description: Address and Size of the L1 PRAM internal memory region
  101         - description: Address and Size of the L1 DRAM internal memory region
  102     reg-names:
  103       items:
  104         - const: l2sram
  105         - const: l1pram
  106         - const: l1dram
  107 else:
  108   if:
  109     properties:
  110       compatible:
  111         enum:
  112           - ti,j721e-c71-dsp
  113           - ti,j721s2-c71-dsp
  114   then:
  115     properties:
  116       reg:
  117         items:
  118           - description: Address and Size of the L2 SRAM internal memory region
  119           - description: Address and Size of the L1 DRAM internal memory region
  120       reg-names:
  121         items:
  122           - const: l2sram
  123           - const: l1dram
  124 
  125 required:
  126   - compatible
  127   - reg
  128   - reg-names
  129   - ti,sci
  130   - ti,sci-dev-id
  131   - ti,sci-proc-ids
  132   - resets
  133   - firmware-name
  134   - mboxes
  135   - memory-region
  136 
  137 unevaluatedProperties: false
  138 
  139 examples:
  140   - |
  141     soc {
  142         #address-cells = <2>;
  143         #size-cells = <2>;
  144 
  145         mailbox0_cluster3: mailbox-0 {
  146             #mbox-cells = <1>;
  147         };
  148 
  149         mailbox0_cluster4: mailbox-1 {
  150             #mbox-cells = <1>;
  151         };
  152 
  153         bus@100000 {
  154             compatible = "simple-bus";
  155             #address-cells = <2>;
  156             #size-cells = <2>;
  157             ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
  158                      <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */
  159                      <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
  160                      <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */
  161 
  162             /* J721E C66_0 DSP node */
  163             dsp@4d80800000 {
  164                 compatible = "ti,j721e-c66-dsp";
  165                 reg = <0x4d 0x80800000 0x00 0x00048000>,
  166                       <0x4d 0x80e00000 0x00 0x00008000>,
  167                       <0x4d 0x80f00000 0x00 0x00008000>;
  168                 reg-names = "l2sram", "l1pram", "l1dram";
  169                 ti,sci = <&dmsc>;
  170                 ti,sci-dev-id = <142>;
  171                 ti,sci-proc-ids = <0x03 0xFF>;
  172                 resets = <&k3_reset 142 1>;
  173                 firmware-name = "j7-c66_0-fw";
  174                 memory-region = <&c66_0_dma_memory_region>,
  175                                 <&c66_0_memory_region>;
  176                 mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
  177             };
  178 
  179             /* J721E C71_0 DSP node */
  180             c71_0: dsp@64800000 {
  181                 compatible = "ti,j721e-c71-dsp";
  182                 reg = <0x00 0x64800000 0x00 0x00080000>,
  183                       <0x00 0x64e00000 0x00 0x0000c000>;
  184                 reg-names = "l2sram", "l1dram";
  185                 ti,sci = <&dmsc>;
  186                 ti,sci-dev-id = <15>;
  187                 ti,sci-proc-ids = <0x30 0xFF>;
  188                 resets = <&k3_reset 15 1>;
  189                 firmware-name = "j7-c71_0-fw";
  190                 memory-region = <&c71_0_dma_memory_region>,
  191                                 <&c71_0_memory_region>;
  192                 mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
  193             };
  194         };
  195     };

Cache object: 6bf2a81a464ee1b7c1dbc2510b7a8f5b


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