hisilicon,hi3660-reset.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Hisilicon System Reset Controller
    8 
    9 maintainers:
   10   - Wei Xu <xuwei5@hisilicon.com>
   11 
   12 description: |
   13   Please also refer to reset.txt in this directory for common reset
   14   controller binding usage.
   15   The reset controller registers are part of the system-ctl block on
   16   hi3660 and hi3670 SoCs.
   17 
   18 properties:
   19   compatible:
   20     oneOf:
   21       - items:
   22           - const: hisilicon,hi3660-reset
   23       - items:
   24           - const: hisilicon,hi3670-reset
   25           - const: hisilicon,hi3660-reset
   26 
   27   hisi,rst-syscon:
   28     deprecated: true
   29     description: phandle of the reset's syscon, use hisilicon,rst-syscon instead
   30     $ref: /schemas/types.yaml#/definitions/phandle
   31 
   32   hisilicon,rst-syscon:
   33     description: phandle of the reset's syscon.
   34     $ref: /schemas/types.yaml#/definitions/phandle
   35 
   36   '#reset-cells':
   37     description: |
   38       Specifies the number of cells needed to encode a reset source.
   39       Cell #1 : offset of the reset assert control register from the syscon
   40                 register base
   41                 offset + 4: deassert control register
   42                 offset + 8: status control register
   43       Cell #2 : bit position of the reset in the reset control register
   44     const: 2
   45 
   46 required:
   47   - compatible
   48 
   49 additionalProperties: false
   50 
   51 examples:
   52   - |
   53     #include <dt-bindings/interrupt-controller/irq.h>
   54     #include <dt-bindings/interrupt-controller/arm-gic.h>
   55     #include <dt-bindings/clock/hi3660-clock.h>
   56 
   57     iomcu: iomcu@ffd7e000 {
   58         compatible = "hisilicon,hi3660-iomcu", "syscon";
   59         reg = <0xffd7e000 0x1000>;
   60     };
   61 
   62     iomcu_rst: iomcu_rst_controller {
   63         compatible = "hisilicon,hi3660-reset";
   64         hisilicon,rst-syscon = <&iomcu>;
   65         #reset-cells = <2>;
   66     };
   67 
   68     /* Specifying reset lines connected to IP modules */
   69     i2c@ffd71000 {
   70         compatible = "snps,designware-i2c";
   71         reg = <0xffd71000 0x1000>;
   72         interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
   73         #address-cells = <1>;
   74         #size-cells = <0>;
   75         clock-frequency = <400000>;
   76         clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>;
   77         resets = <&iomcu_rst 0x20 3>;
   78         pinctrl-names = "default";
   79         pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;
   80     };
   81 ...

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/reset/hisilicon,hi3660-reset.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/reset/hisilicon,hi3660-reset.yaml