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     1 Hisilicon System Reset Controller
    2 ======================================
    3 
    4 Please also refer to reset.txt in this directory for common reset
    5 controller binding usage.
    6 
    7 The reset controller registers are part of the system-ctl block on
    8 hi6220 SoC.
    9 
   10 Required properties:
   11 - compatible: should be one of the following:
   12   - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
   13   - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
   14   - "hisilicon,hi6220-aoctrl", "syscon" : For ao reset controller.
   15 - reg: should be register base and length as documented in the
   16   datasheet
   17 - #reset-cells: 1, see below
   18 
   19 Example:
   20 sys_ctrl: sys_ctrl@f7030000 {
   21         compatible = "hisilicon,hi6220-sysctrl", "syscon";
   22         reg = <0x0 0xf7030000 0x0 0x2000>;
   23         #clock-cells = <1>;
   24         #reset-cells = <1>;
   25 };
   26 
   27 Specifying reset lines connected to IP modules
   28 ==============================================
   29 example:
   30 
   31         uart1: serial@..... {
   32                 ...
   33                 resets = <&sys_ctrl PERIPH_RSTEN3_UART1>;
   34                 ...
   35         };
   36 
   37 The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>.
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