intel,rcu-gw.yaml

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/reset/intel,rcu-gw.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: System Reset Controller on Intel Gateway SoCs
    8 
    9 maintainers:
   10   - Dilip Kota <eswara.kota@linux.intel.com>
   11 
   12 properties:
   13   compatible:
   14     enum:
   15       - intel,rcu-lgm
   16       - intel,rcu-xrx200
   17 
   18   reg:
   19     description: Reset controller registers.
   20     maxItems: 1
   21 
   22   intel,global-reset:
   23     description: Global reset register offset and bit offset.
   24     $ref: /schemas/types.yaml#/definitions/uint32-array
   25     items:
   26       - description: Register offset
   27       - description: Register bit offset
   28         minimum: 0
   29         maximum: 31
   30 
   31   "#reset-cells":
   32     minimum: 2
   33     maximum: 3
   34     description: |
   35       First cell is reset request register offset.
   36       Second cell is bit offset in reset request register.
   37       Third cell is bit offset in reset status register.
   38       For LGM SoC, reset cell count is 2 as bit offset in
   39       reset request and reset status registers is same. Whereas
   40       3 for legacy SoCs as bit offset differs.
   41 
   42 required:
   43   - compatible
   44   - reg
   45   - intel,global-reset
   46   - "#reset-cells"
   47 
   48 additionalProperties: false
   49 
   50 examples:
   51   - |
   52     rcu0: reset-controller@e0000000 {
   53         compatible = "intel,rcu-lgm";
   54         reg = <0xe0000000 0x20000>;
   55         intel,global-reset = <0x10 30>;
   56         #reset-cells = <2>;
   57     };
   58 
   59     pwm: pwm@e0d00000 {
   60         compatible = "intel,lgm-pwm";
   61         reg = <0xe0d00000 0x30>;
   62         clocks = <&cgu0 1>;
   63         #pwm-cells = <2>;
   64         resets = <&rcu0 0x30 21>;
   65     };

Cache object: 322fa74f5ce88a70d14417810684c98d

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/reset/intel,rcu-gw.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/reset/intel,rcu-gw.yaml