The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/reset/nxp,lpc1850-rgu.txt

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    1 NXP LPC1850  Reset Generation Unit (RGU)
    2 ========================================
    3 
    4 Please also refer to reset.txt in this directory for common reset
    5 controller binding usage.
    6 
    7 Required properties:
    8 - compatible: Should be "nxp,lpc1850-rgu"
    9 - reg: register base and length
   10 - clocks: phandle and clock specifier to RGU clocks
   11 - clock-names: should contain "delay" and "reg"
   12 - #reset-cells: should be 1
   13 
   14 See table below for valid peripheral reset numbers. Numbers not
   15 in the table below are either reserved or not applicable for
   16 normal operation.
   17 
   18 Reset   Peripheral
   19   9     System control unit (SCU)
   20  12     ARM Cortex-M0 subsystem core (LPC43xx only)
   21  13     CPU core
   22  16     LCD controller
   23  17     USB0
   24  18     USB1
   25  19     DMA
   26  20     SDIO
   27  21     External memory controller (EMC)
   28  22     Ethernet
   29  25     Flash bank A
   30  27     EEPROM
   31  28     GPIO
   32  29     Flash bank B
   33  32     Timer0
   34  33     Timer1
   35  34     Timer2
   36  35     Timer3
   37  36     Repetitive Interrupt timer (RIT)
   38  37     State Configurable Timer (SCT)
   39  38     Motor control PWM (MCPWM)
   40  39     QEI
   41  40     ADC0
   42  41     ADC1
   43  42     DAC
   44  44     USART0
   45  45     UART1
   46  46     USART2
   47  47     USART3
   48  48     I2C0
   49  49     I2C1
   50  50     SSP0
   51  51     SSP1
   52  52     I2S0 and I2S1
   53  53     Serial Flash Interface (SPIFI)
   54  54     C_CAN1
   55  55     C_CAN0
   56  56     ARM Cortex-M0 application core (LPC4370 only)
   57  57     SGPIO (LPC43xx only)
   58  58     SPI (LPC43xx only)
   59  60     ADCHS (12-bit ADC) (LPC4370 only)
   60 
   61 Refer to NXP LPC18xx or LPC43xx user manual for more details about
   62 the reset signals and the connected block/peripheral.
   63 
   64 Reset provider example:
   65 rgu: reset-controller@40053000 {
   66         compatible = "nxp,lpc1850-rgu";
   67         reg = <0x40053000 0x1000>;
   68         clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_BUS>;
   69         clock-names = "delay", "reg";
   70         #reset-cells = <1>;
   71 };
   72 
   73 Reset consumer example:
   74 mac: ethernet@40010000 {
   75         compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac";
   76         reg = <0x40010000 0x2000>;
   77         interrupts = <5>;
   78         interrupt-names = "macirq";
   79         clocks = <&ccu1 CLK_CPU_ETHERNET>;
   80         clock-names = "stmmaceth";
   81         resets = <&rgu 22>;
   82         reset-names = "stmmaceth";
   83 };

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