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     1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/reset/snps,axs10x-reset.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: AXS10x reset controller
    8 
    9 maintainers:
   10   - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
   11 
   12 description: |
   13   This binding describes the ARC AXS10x boards custom IP-block which allows
   14   to control reset signals of selected peripherals. For example DW GMAC, etc...
   15   This block is controlled via memory-mapped register (AKA CREG) which
   16   represents up-to 32 reset lines.
   17   As of today only the following lines are used:
   18    - DW GMAC - line 5
   19 
   20 properties:
   21   compatible:
   22     const: snps,axs10x-reset
   23 
   24   reg:
   25     maxItems: 1
   26 
   27   '#reset-cells':
   28     const: 1
   29 
   30 required:
   31   - compatible
   32   - reg
   33   - '#reset-cells'
   34 
   35 additionalProperties: false
   36 
   37 examples:
   38   - |
   39     reset: reset-controller@11220 {
   40         compatible = "snps,axs10x-reset";
   41         #reset-cells = <1>;
   42         reg = <0x11220 0x4>;
   43     };
   44 
   45     // Specifying reset lines connected to IP modules:
   46     ethernet {
   47         resets = <&reset 5>;
   48     };
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