The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/reset/zynq-reset.txt

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 Xilinx Zynq Reset Manager
    2 
    3 The Zynq AP-SoC has several different resets.
    4 
    5 See Chapter 26 of the Zynq TRM (UG585) for more information about Zynq resets.
    6 
    7 Required properties:
    8 - compatible: "xlnx,zynq-reset"
    9 - reg: SLCR offset and size taken via syscon <0x200 0x48>
   10 - syscon: <&slcr>
   11   This should be a phandle to the Zynq's SLCR registers.
   12 - #reset-cells: Must be 1
   13 
   14 The Zynq Reset Manager needs to be a childnode of the SLCR.
   15 
   16 Example:
   17         rstc: rstc@200 {
   18                 compatible = "xlnx,zynq-reset";
   19                 reg = <0x200 0x48>;
   20                 #reset-cells = <1>;
   21                 syscon = <&slcr>;
   22         };
   23 
   24 Reset outputs:
   25  0  : soft reset
   26  32 : ddr reset
   27  64 : topsw reset
   28  96 : dmac reset
   29  128: usb0 reset
   30  129: usb1 reset
   31  160: gem0 reset
   32  161: gem1 reset
   33  164: gem0 rx reset
   34  165: gem1 rx reset
   35  166: gem0 ref reset
   36  167: gem1 ref reset
   37  192: sdio0 reset
   38  193: sdio1 reset
   39  196: sdio0 ref reset
   40  197: sdio1 ref reset
   41  224: spi0 reset
   42  225: spi1 reset
   43  226: spi0 ref reset
   44  227: spi1 ref reset
   45  256: can0 reset
   46  257: can1 reset
   47  258: can0 ref reset
   48  259: can1 ref reset
   49  288: i2c0 reset
   50  289: i2c1 reset
   51  320: uart0 reset
   52  321: uart1 reset
   53  322: uart0 ref reset
   54  323: uart1 ref reset
   55  352: gpio reset
   56  384: lqspi reset
   57  385: qspi ref reset
   58  416: smc reset
   59  417: smc ref reset
   60  448: ocm reset
   61  512: fpga0 out reset
   62  513: fpga1 out reset
   63  514: fpga2 out reset
   64  515: fpga3 out reset
   65  544: a9 reset 0
   66  545: a9 reset 1
   67  552: peri reset
   68 

Cache object: 7d8335cf3d1ae6b054004dfe874ded24


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.