The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/serial/renesas,em-uart.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: "http://devicetree.org/schemas/serial/renesas,em-uart.yaml#"
    5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
    6 
    7 title: Renesas EMMA Mobile UART Interface
    8 
    9 maintainers:
   10   - Magnus Damm <magnus.damm@gmail.com>
   11 
   12 properties:
   13   compatible:
   14     oneOf:
   15       - items:
   16           - enum:
   17               - renesas,r9a09g011-uart    # RZ/V2M
   18           - const: renesas,em-uart        # generic EMMA Mobile compatible UART
   19 
   20       - items:
   21           - const: renesas,em-uart        # generic EMMA Mobile compatible UART
   22 
   23   reg:
   24     maxItems: 1
   25 
   26   interrupts:
   27     maxItems: 1
   28 
   29   clocks:
   30     minItems: 1
   31     items:
   32       - description: UART functional clock
   33       - description: Internal clock to access the registers
   34 
   35   clock-names:
   36     minItems: 1
   37     items:
   38       - const: sclk
   39       - const: pclk
   40 
   41 allOf:
   42   - $ref: serial.yaml#
   43 
   44   - if:
   45       properties:
   46         compatible:
   47           contains:
   48             const: renesas,r9a09g011-uart
   49     then:
   50       properties:
   51         clocks:
   52           minItems: 2
   53         clock-names:
   54           minItems: 2
   55 
   56 required:
   57   - compatible
   58   - reg
   59   - interrupts
   60   - clocks
   61   - clock-names
   62 
   63 unevaluatedProperties: false
   64 
   65 examples:
   66   - |
   67     #include <dt-bindings/interrupt-controller/arm-gic.h>
   68     uart0: serial@e1020000 {
   69             compatible = "renesas,em-uart";
   70             reg = <0xe1020000 0x38>;
   71             interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
   72             clocks = <&usia_u0_sclk>;
   73             clock-names = "sclk";
   74     };

Cache object: f3b375dd5ea1ebb4696cc3d15b351ac9


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