1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/serial/samsung_uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
8
9 maintainers:
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
12
13 description: |+
14 Each Samsung UART should have an alias correctly numbered in the "aliases"
15 node, according to serialN format, where N is the port number (non-negative
16 decimal integer) as specified by User's Manual of respective SoC.
17
18 properties:
19 compatible:
20 items:
21 - enum:
22 - apple,s5l-uart
23 - axis,artpec8-uart
24 - samsung,s3c2410-uart
25 - samsung,s3c2412-uart
26 - samsung,s3c2440-uart
27 - samsung,s3c6400-uart
28 - samsung,s5pv210-uart
29 - samsung,exynos4210-uart
30 - samsung,exynos5433-uart
31 - samsung,exynos850-uart
32
33 reg:
34 maxItems: 1
35
36 reg-io-width:
37 description: |
38 The size (in bytes) of the IO accesses that should be performed
39 on the device.
40 $ref: /schemas/types.yaml#/definitions/uint32
41 enum: [ 1, 4 ]
42
43 clocks:
44 minItems: 2
45 maxItems: 5
46
47 clock-names:
48 description: N = 0 is allowed for SoCs without internal baud clock mux.
49 minItems: 2
50 items:
51 - const: uart
52 - pattern: '^clk_uart_baud[0-3]$'
53 - pattern: '^clk_uart_baud[0-3]$'
54 - pattern: '^clk_uart_baud[0-3]$'
55 - pattern: '^clk_uart_baud[0-3]$'
56
57 dmas:
58 items:
59 - description: DMA controller phandle and request line for RX
60 - description: DMA controller phandle and request line for TX
61
62 dma-names:
63 items:
64 - const: rx
65 - const: tx
66
67 interrupts:
68 description: RX interrupt and optionally TX interrupt.
69 minItems: 1
70 maxItems: 2
71
72 samsung,uart-fifosize:
73 description: The fifo size supported by the UART channel.
74 $ref: /schemas/types.yaml#/definitions/uint32
75 enum: [16, 64, 256]
76
77 required:
78 - compatible
79 - clocks
80 - clock-names
81 - interrupts
82 - reg
83
84 unevaluatedProperties: false
85
86 allOf:
87 - $ref: serial.yaml#
88
89 - if:
90 properties:
91 compatible:
92 contains:
93 enum:
94 - samsung,s3c2410-uart
95 - samsung,s5pv210-uart
96 then:
97 properties:
98 clocks:
99 minItems: 2
100 maxItems: 3
101 clock-names:
102 minItems: 2
103 items:
104 - const: uart
105 - pattern: '^clk_uart_baud[0-1]$'
106 - pattern: '^clk_uart_baud[0-1]$'
107
108 - if:
109 properties:
110 compatible:
111 contains:
112 enum:
113 - apple,s5l-uart
114 - axis,artpec8-uart
115 - samsung,exynos4210-uart
116 - samsung,exynos5433-uart
117 then:
118 properties:
119 clocks:
120 maxItems: 2
121 clock-names:
122 items:
123 - const: uart
124 - const: clk_uart_baud0
125
126 examples:
127 - |
128 #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
129
130 uart0: serial@7f005000 {
131 compatible = "samsung,s3c6400-uart";
132 reg = <0x7f005000 0x100>;
133 interrupt-parent = <&vic1>;
134 interrupts = <5>;
135 clock-names = "uart", "clk_uart_baud2",
136 "clk_uart_baud3";
137 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
138 <&clocks SCLK_UART>;
139 samsung,uart-fifosize = <16>;
140 };
Cache object: defe5e14dbf9cc303af472e897463cf5
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