exynos-usi.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Samsung's Exynos USI (Universal Serial Interface) binding
    8 
    9 maintainers:
   10   - Sam Protsenko <semen.protsenko@linaro.org>
   11   - Krzysztof Kozlowski <krzk@kernel.org>
   12 
   13 description: |
   14   USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
   15   USI shares almost all internal circuits within each protocol, so only one
   16   protocol can be chosen at a time. USI is modeled as a node with zero or more
   17   child nodes, each representing a serial sub-node device. The mode setting
   18   selects which particular function will be used.
   19 
   20 properties:
   21   $nodename:
   22     pattern: "^usi@[0-9a-f]+$"
   23 
   24   compatible:
   25     oneOf:
   26       - items:
   27           - const: samsung,exynosautov9-usi
   28           - const: samsung,exynos850-usi
   29       - enum:
   30           - samsung,exynos850-usi
   31 
   32   reg: true
   33 
   34   clocks: true
   35 
   36   clock-names: true
   37 
   38   ranges: true
   39 
   40   "#address-cells":
   41     const: 1
   42 
   43   "#size-cells":
   44     const: 1
   45 
   46   samsung,sysreg:
   47     $ref: /schemas/types.yaml#/definitions/phandle-array
   48     items:
   49       - items:
   50           - description: phandle to System Register syscon node
   51           - description: offset of SW_CONF register for this USI controller
   52     description:
   53       Should be phandle/offset pair. The phandle to System Register syscon node
   54       (for the same domain where this USI controller resides) and the offset
   55       of SW_CONF register for this USI controller.
   56 
   57   samsung,mode:
   58     $ref: /schemas/types.yaml#/definitions/uint32
   59     description:
   60       Selects USI function (which serial protocol to use). Refer to
   61       <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
   62 
   63   samsung,clkreq-on:
   64     type: boolean
   65     description:
   66       Enable this property if underlying protocol requires the clock to be
   67       continuously provided without automatic gating. As suggested by SoC
   68       manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
   69       multi-master mode. Usually this property is needed if USI mode is set
   70       to "UART".
   71 
   72       This property is optional.
   73 
   74 patternProperties:
   75   "^i2c@[0-9a-f]+$":
   76     $ref: /schemas/i2c/i2c-exynos5.yaml
   77     description: Child node describing underlying I2C
   78 
   79   "^serial@[0-9a-f]+$":
   80     $ref: /schemas/serial/samsung_uart.yaml
   81     description: Child node describing underlying UART/serial
   82 
   83   "^spi@[0-9a-f]+$":
   84     $ref: /schemas/spi/samsung,spi.yaml
   85     description: Child node describing underlying SPI
   86 
   87 required:
   88   - compatible
   89   - ranges
   90   - "#address-cells"
   91   - "#size-cells"
   92   - samsung,sysreg
   93   - samsung,mode
   94 
   95 if:
   96   properties:
   97     compatible:
   98       contains:
   99         enum:
  100           - samsung,exynos850-usi
  101 
  102 then:
  103   properties:
  104     reg:
  105       maxItems: 1
  106 
  107     clocks:
  108       items:
  109         - description: Bus (APB) clock
  110         - description: Operating clock for UART/SPI/I2C protocol
  111 
  112     clock-names:
  113       items:
  114         - const: pclk
  115         - const: ipclk
  116 
  117   required:
  118     - reg
  119     - clocks
  120     - clock-names
  121 
  122 else:
  123   properties:
  124     reg: false
  125     clocks: false
  126     clock-names: false
  127     samsung,clkreq-on: false
  128 
  129 additionalProperties: false
  130 
  131 examples:
  132   - |
  133     #include <dt-bindings/interrupt-controller/arm-gic.h>
  134     #include <dt-bindings/soc/samsung,exynos-usi.h>
  135 
  136     usi0: usi@138200c0 {
  137         compatible = "samsung,exynos850-usi";
  138         reg = <0x138200c0 0x20>;
  139         samsung,sysreg = <&sysreg_peri 0x1010>;
  140         samsung,mode = <USI_V2_UART>;
  141         samsung,clkreq-on; /* needed for UART mode */
  142         #address-cells = <1>;
  143         #size-cells = <1>;
  144         ranges;
  145         clocks = <&cmu_peri 32>, <&cmu_peri 31>;
  146         clock-names = "pclk", "ipclk";
  147 
  148         serial_0: serial@13820000 {
  149             compatible = "samsung,exynos850-uart";
  150             reg = <0x13820000 0xc0>;
  151             interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
  152             clocks = <&cmu_peri 32>, <&cmu_peri 31>;
  153             clock-names = "uart", "clk_uart_baud0";
  154             status = "disabled";
  155         };
  156 
  157         hsi2c_0: i2c@13820000 {
  158             compatible = "samsung,exynosautov9-hsi2c";
  159             reg = <0x13820000 0xc0>;
  160             interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
  161             #address-cells = <1>;
  162             #size-cells = <0>;
  163             clocks = <&cmu_peri 31>, <&cmu_peri 32>;
  164             clock-names = "hsi2c", "hsi2c_pclk";
  165             status = "disabled";
  166         };
  167     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/soc/samsung/exynos-usi.yaml

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sys/contrib/device-tree/Bindings/soc/samsung/exynos-usi.yaml