The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/soc/ti/k3-ringacc.txt

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    1 * Texas Instruments K3 NavigatorSS Ring Accelerator
    2 
    3 The Ring Accelerator (RA) is a machine which converts read/write accesses
    4 from/to a constant address into corresponding read/write accesses from/to a
    5 circular data structure in memory. The RA eliminates the need for each DMA
    6 controller which needs to access ring elements from having to know the current
    7 state of the ring (base address, current offset). The DMA controller
    8 performs a read or write access to a specific address range (which maps to the
    9 source interface on the RA) and the RA replaces the address for the transaction
   10 with a new address which corresponds to the head or tail element of the ring
   11 (head for reads, tail for writes).
   12 
   13 The Ring Accelerator is a hardware module that is responsible for accelerating
   14 management of the packet queues. The K3 SoCs can have more than one RA instances
   15 
   16 Required properties:
   17 - compatible    : Must be "ti,am654-navss-ringacc";
   18 - reg           : Should contain register location and length of the following
   19                   named register regions.
   20 - reg-names     : should be
   21                   "rt" - The RA Ring Real-time Control/Status Registers
   22                   "fifos" - The RA Queues Registers
   23                   "proxy_gcfg" - The RA Proxy Global Config Registers
   24                   "proxy_target" - The RA Proxy Datapath Registers
   25 - ti,num-rings  : Number of rings supported by RA
   26 - ti,sci-rm-range-gp-rings : TI-SCI RM subtype for GP ring range
   27 - ti,sci        : phandle on TI-SCI compatible System controller node
   28 - ti,sci-dev-id : TI-SCI device id of the ring accelerator
   29 - msi-parent    : phandle for "ti,sci-inta" interrupt controller
   30 
   31 Optional properties:
   32  -- ti,dma-ring-reset-quirk : enable ringacc / udma ring state interoperability
   33                   issue software w/a
   34 
   35 Example:
   36 
   37 ringacc: ringacc@3c000000 {
   38         compatible = "ti,am654-navss-ringacc";
   39         reg =   <0x0 0x3c000000 0x0 0x400000>,
   40                 <0x0 0x38000000 0x0 0x400000>,
   41                 <0x0 0x31120000 0x0 0x100>,
   42                 <0x0 0x33000000 0x0 0x40000>;
   43         reg-names = "rt", "fifos",
   44                     "proxy_gcfg", "proxy_target";
   45         ti,num-rings = <818>;
   46         ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
   47         ti,dma-ring-reset-quirk;
   48         ti,sci = <&dmsc>;
   49         ti,sci-dev-id = <187>;
   50         msi-parent = <&inta_main_udmass>;
   51 };
   52 
   53 client:
   54 
   55 dma_ipx: dma_ipx@<addr> {
   56         ...
   57         ti,ringacc = <&ringacc>;
   58         ...
   59 }

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